AD8065 datasheet(40/60 Pages) AD

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Data Sheet

AD3551R

REGISTERS

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Rev. 0 | 40 of 60

INTERFACE REGISTER DETAILS

Interface Configuration A Register

Address: 0x00, Reset: 0x10, Name: INTERFACE_CONFIG_A

Interface configuration settings.

Table 18. Bit Descriptions for INTERFACE_CONFIG_A

Bits

Bit Name

Settings

Description

Reset

Access

SW_RESET_MSB

First of Two Software Reset Bits. Setting both software reset bits

(SW_RESET_MSB and SW_RESET_LSB) in a single SPI write performs a

software device reset, returning all registers (except the INTERFACE_CONFIG_A

0x0

R/W

0 Do nothing.

1 Initiates a software reset if the SW_RESET_LSB bit is also set to 1 in the same

RESERVED

Reserved.

0x0

ADDR_DIRECTION

Address Direction Bit. Determines sequential addressing behavior when

performing register reads and writes on multiple bytes of data in a single data

phase.

0x0

R/W

0 Address descending. Address accessed is automatically decremented by one for

each data byte when streaming or addressing multibyte registers.

1 Address ascending. Address accessed is automatically incremented by one for

each data byte when streaming or addressing multibyte registers.

SDO_ACTIVE

SDO Pin Enabled.

0x1

[3:1]

RESERVED

Reserved.

0x0

SW_RESET_LSB

Second of Two Software Reset Bits. Setting both software reset bits

(SW_RESET_MSB and SW_RESET_LSB) in a single SPI write performs a

software device reset, returning all registers (except the INTERFACE_CONFIG_A

0x0

R/W

0 Do nothing.

1 Initiates a software reset if the SW_RESET_LSB bit is also set to 1 in the same

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