STM32G030C8 datasheet(24/94 Pages) STMICROELECTRONICS

24 / 94 page

Functional overview

STM32G030x6/x8

24/94

DS12991 Rev 4

DMA request and support quadrature encoders. Its counter can be frozen in debug

mode.

•

TIM14

This timer is based on a 16-bit auto-reload upcounter and a 16-bit prescaler. It has one

channel for input capture/output compare, PWM output or one-pulse mode output. Its

counter can be frozen in debug mode.

•

TIM16, TIM17

These are general-purpose timers featuring:

–

16-bit auto-reload upcounter and 16-bit prescaler

–

1 channel and 1 complementary channel

All channels can be used for input capture/output compare, PWM or one-pulse mode

output. The timers can operate together via the Timer Link feature for synchronization

or event chaining. They can generate independent DMA request. Their counters can

be frozen in debug mode.

3.15.3

Independent watchdog (IWDG)

The independent watchdog is based on an 8-bit prescaler and 12-bit downcounter with

user-defined refresh window. It is clocked from an independent 32 kHz internal RC (LSI).

Independent of the main clock, it can operate in Stop and Standby modes. It can be used

either as a watchdog to reset the device when a problem occurs, or as a free-running timer

for application timeout management. It is hardware- or software-configurable through the

option bytes. Its counter can be frozen in debug mode.

3.15.4

System window watchdog (WWDG)

The window watchdog is based on a 7-bit downcounter that can be set as free-running. It

can be used as a watchdog to reset the device when a problem occurs. It is clocked by the

system clock. It has an early-warning interrupt capability. Its counter can be frozen in debug

mode.

3.15.5

SysTick timer

This timer is dedicated to real-time operating systems, but it can also be used as a standard

down counter.

Features of SysTick timer:

•

24-bit down counter

•

Autoreload capability

•

Maskable system interrupt generation when the counter reaches 0

•

Programmable clock source

3.16

Real-time clock (RTC), tamper (TAMP) and backup registers

The device embeds an RTC and five 32-bit backup registers, located in the RTC domain of

the silicon die.

The ways of powering the RTC domain are described in Section 3.7.6.

The RTC is an independent BCD timer/counter.

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