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STM32L151XE датащи(PDF) 29 Page - STMicroelectronics |
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STM32L151XE датащи(HTML) 29 Page - STMicroelectronics |
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29 / 136 page ![]() DS10002 Rev 10 29/136 STM32L151xE STM32L152xE Functional overview 56 They can also be used as simple time bases and be clocked by the LSE clock source (32.768 kHz) to provide time bases independent from the main CPU clock. 3.16.2 Basic timers (TIM6 and TIM7) These timers are mainly used for DAC trigger generation. They can also be used as generic 16-bit time bases. 3.16.3 SysTick timer This timer is dedicated to the OS, but could also be used as a standard downcounter. It is based on a 24-bit downcounter with autoreload capability and a programmable clock source. It features a maskable system interrupt generation when the counter reaches 0. 3.16.4 Independent watchdog (IWDG) The independent watchdog is based on a 12-bit downcounter and 8-bit prescaler. It is clocked from an independent 37 kHz internal RC and, as it operates independently of the main clock, it can operate in Stop and Standby modes. It can be used either as a watchdog to reset the device when a problem occurs, or as a free-running timer for application timeout management. It is hardware- or software-configurable through the option bytes. The counter can be frozen in debug mode. 3.16.5 Window watchdog (WWDG) The window watchdog is based on a 7-bit downcounter that can be set as free-running. It can be used as a watchdog to reset the device when a problem occurs. It is clocked from the main clock. It has an early warning interrupt capability and the counter can be frozen in debug mode. 3.17 Communication interfaces 3.17.1 I²C bus Up to two I²C bus interfaces can operate in multimaster and slave modes. They can support standard and fast modes. They support dual slave addressing (7-bit only) and both 7- and 10-bit addressing in master mode. A hardware CRC generation/verification is embedded. They can be served by DMA and they support SM Bus 2.0/PM Bus. 3.17.2 Universal synchronous/asynchronous receiver transmitter (USART) The three USART and two UART interfaces are able to communicate at speeds of up to 4 Mbit/s. They support IrDA SIR ENDEC and have LIN Master/Slave capability. The three USARTs provide hardware management of the CTS and RTS signals and are ISO 7816 compliant. All USART/UART interfaces can be served by the DMA controller. |
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