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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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STM32L151XE датащи(PDF) 97 Page - STMicroelectronics |
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STM32L151XE датащи(HTML) 97 Page - STMicroelectronics |
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97 / 136 page  DS10002 Rev 10 97/136 STM32L151xE STM32L152xE Electrical characteristics 114 SPI characteristics Unless otherwise specified, the parameters given in the following table are derived from tests performed under the conditions summarized in Table 13. Refer to Section 6.3.12: I/O current injection characteristics for more details on the input/output alternate function characteristics (NSS, SCK, MOSI, MISO). Table 49. SPI characteristics(1) Symbol Parameter Conditions Min Max(2) Unit fSCK 1/tc(SCK) SPI clock frequency Master mode - 16 MHz Slave mode - 16 Slave transmitter - 12(3) tr(SCK)(2) tf(SCK)(2) SPI clock rise and fall time Capacitive load: C = 30 pF - 6 ns DuCy(SCK) SPI slave input clock duty cycle Slave mode 30 70 % tsu(NSS) NSS setup time Slave mode 4tHCLK - ns th(NSS) NSS hold time Slave mode 2tHCLK - tw(SCKH)(2) tw(SCKL)(2) SCK high and low time Master mode tSCK/2 − 5tSCK/2 +3 tsu(MI)(2) Data input setup time Master mode 5 - tsu(SI)(2) Slave mode 6 - th(MI)(2) Data input hold time Master mode 5 - th(SI)(2) Slave mode 5 - ta(SO)(4) Data output access time Slave mode 0 3tHCLK tv(SO) (2) Data output valid time Slave mode - 33 tv(MO)(2) Data output valid time Master mode - 6.5 th(SO)(2) Data output hold time Slave mode 17 - th(MO)(2) Master mode 0.5 - 1. The characteristics above are given for voltage range 1. 2. Guaranteed by characterization results. 3. The maximum SPI clock frequency in slave transmitter mode is given for an SPI slave input clock duty cycle (DuCy(SCK)) ranging between 40 to 60%. 4. Min time is for the minimum time to drive the output and max time is for the maximum time to validate the data. |
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