SPC58ECX datasheet(149/153 Pages) STMICROELECTRONICS

149 / 153 page

DS11620 Rev 8

149/153

SPC584Cx, SPC58ECx

Revision history

152

16-Jun-2020

Section 4.10: PLLs

Section 4.10.1: PLL0

Table 20: PLL0 electrical characteristics

– Changed condition from T to D for

|ΔPLL0PHI1SPJ|, ΔPLL0LTJ and IPLL0.

– Updated Max value for fPLL0PHI0 symbol and removed the footnote.

Section 4.10.2: PLL1

Table 21: PLL1 electrical characteristics

: changed condition from T to D for IPLL1

Section 4.11: Oscillators

Section :

Table 24: Internal RC oscillator electrical specifications

– Updated 1.

– Updated Max value for IFIRC.

Section 4.12: ADC system

Section 4.12.1: ADC input description

Figure 8: Input equivalent circuit (Fast SARn and SARB channels)

: added

parameter “CEXT: external capacitance” and component to scheme.

Table 26: ADC pin specification

: added row for symbol “CEXT / SR”.

Section 4.14: LFAST pad electrical characteristics

Section 4.14.2: LFAST LVDS interface electrical characteristics

Table 30: LVDS pad startup and receiver electrical characteristics

– Removed the last sentence of Note “Total internal capacitance...”.

– Move table footnote 1. and 2. from table title to “Symbol”.

Table 31: LFAST transmitter electrical characteristics

– Move table footnote 1., 2. and 3. from table title to “Symbol”.

Table 32: LFAST PLL electrical characteristics

– Move table footnote 1. from table title to “Symbol”.

Section 4.15: Power management

Section 4.15.1: Power management integration

Table 34: External components integration

– Updated Conditions for CBV.

– Updated notes content and numbering

– Updated Min value for RE

– Updated Typ value for CLVN

– Added note 2 for CFLA

– Added note 6 for CADC

– Updated Min value for RB

Table 82. Document revision history (continued)

Date

Revision

Changes

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