STM32L011E4 datasheet(31/119 Pages) STMICROELECTRONICS

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STM32L011x3/4

Functional overview

3.15.3

Low-power universal asynchronous receiver transmitter (LPUART)

The devices embed one Low-power UART. The LPUART supports asynchronous serial

communication with minimum power consumption. It supports half duplex single wire

communication and modem operations (CTS/RTS). It allows multiprocessor

communication.

The LPUART has a clock domain independent from the CPU clock, and can wake up the

system from Stop mode, using baudrates up to 46 Kbaud. The Wakeup events from Stop

mode are programmable and can be:

•

Start bit detection

•

Or any received data frame

•

Or a specific programmed data frame

Only a 32.768 kHz clock (LSE) is needed to allow LPUART communication up to 9600

baud. Therefore, even in Stop mode, the LPUART can wait for an incoming frame while

having an extremely low energy consumption. Higher speed clock can be used to reach

higher baudrates.

LPUART interface can be served by the DMA controller.

3.15.4

Serial peripheral interface (SPI)

The SPI is able to communicate at up to 16 Mbits/s in slave and master modes in full-duplex

and half-duplex communication modes. The 3-bit prescaler gives 8 master mode

frequencies and the frame is configurable to 8 bits or 16 bits. The hardware CRC

generation/verification supports basic SD Card/MMC modes.

The SPI can be served by the DMA controller.

Refer to Table 11 for the supported modes and features of SPI interface.

3.16

Cyclic redundancy check (CRC) calculation unit

The CRC (cyclic redundancy check) calculation unit is used to get a CRC code using a

configurable generator polynomial value and size.

Among other applications, CRC-based techniques are used to verify data transmission or

storage integrity. In the scope of the EN/IEC 60335-1 standard, they offer a means of

verifying the Flash memory integrity. The CRC calculation unit helps compute a signature of

the software during runtime, to be compared with a reference signature generated at

linktime and stored at a given memory location.

Table 11. SPI implementation

SPI features(1)

1. X = supported.

SPI1

Hardware CRC calculation

I2S mode

TI mode

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