LT8331 datasheet(11/30 Pages) AD

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LT8365

Rev. A

For more information www.analog.com

APPLICATIONS INFORMATION

INTVCC REGULATOR

A low dropout (LDO) linear regulator, supplied from VIN,

produces a 3.2V supply at the INTVCC pin. A minimum

1µF low ESR ceramic capacitor must be used to bypass

the INTVCC pin to ground to supply the high transient cur-

rents required by the internal power MOSFET gate driver.

No additional components or loading is allowed on this

pin. The INTVCC rising threshold (to allow soft-start and

switching) is typically 2.65V. The INTVCC falling threshold

(to stop switching and reset soft-start) is typically 2.5V.

To improve efficiency across all loads, the majority of

INTVCC current can be drawn from the BIAS pin (4.4V ≤

BIAS ≤ VIN) instead of the VIN pin. For SEPIC applications

with VIN often greater than VOUT, the BIAS pin can be di-

rectly connected to VOUT. If the BIAS pin is connected to

a supply other than VOUT, be sure to bypass the pin with

a local ceramic capacitor.

Programming Switching Frequency

The LT8365 uses a constant frequency PWM architecture

that can be programmed to switch from 100kHz to 500kHz

by using a resistor tied from the RT pin to ground. A table

showing the necessary RT value for a desired switching

frequency is in Table 1.

The RT resistor required for a desired switching frequency

can be calculated using:

RT =

45.2k

fOSC1.009

where RT is in kΩ and fOSC is the desired switching fre-

quency in kHz.

Table 1. SW Frequency vs RT Value

fOSC (kHz)

RT (kΩ)

100

432

200

215

300

143

400

107

450

95.3

500

84.5

Synchronization and Mode Selection

To select low ripple Burst Mode operation, for high effi-

ciency at light loads, tie the SYNC/MODE pin below 0.14V

(this can be ground or a logic low output).

To synchronize the LT8365 oscillator to an external fre-

quencyconnectasquarewave(with20%to80%dutycycle)

to the SYNC pin. The square wave amplitude should have

valleys that are below 0.4V and peaks above 1.7V (up to

6V).TheLT8365willnotenterBurstModeoperationatlow

output loads while synchronized to an external clock, but

instead will pulse skip to maintain regulation. The LT8365

may be synchronized over a 100kHz to 500kHz range. The

RT resistor should be chosen to set the LT8365 switching

frequency equal to or below the lowest synchronization

input. For example, if the synchronization signal will be

500kHz and higher, the RT should be selected for 500kHz.

For some applications it is desirable for the LT8365 to

operate in pulse-skipping mode, offering two major differ-

ences from Burst Mode operation. Firstly, the clock stays

awake at all times and all switching cycles are aligned to

the clock. Secondly, the full switching frequency is main-

tained at lower output load than in Burst Mode operation.

These two differences come at the expense of increased

quiescent current. To enable pulse-skipping mode, float

the SYNC pin.

To improve EMI/EMC, the LT8365 can provide spread

spectrumfrequencymodulation(SSFM).Thisfeaturevaries

the clock with a triangle frequency modulation of 20%. For

example, if the LT8365's frequency was programmed to

switch at 500kHz, spread spectrum mode will modulate

the oscillator between 500kHz and 600kHz. The 20%

modulation will occur at a frequency: fOSC/256 where fOSC

is the switching frequency programmed using the RT pin.

The LT8365 can also be configured to operate in pulse-

skipping/SSFM mode by tying the SYNC/MODE pin above

1.7V. The LT8365 can also be configured for Burst Mode

operation at light loads (for improved efficiency) and

SSFM at heavy loads (for low EMI) by tying a 100k from

the SYNC/MODE pin to GND.

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