TMP114 datasheet(13/50 Pages) TI

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8.3 Feature Description

8.3.1 1.2 V Compatible Logic Inputs

The TMP114 features static input thresholds on the SCL and SDA pins independent of supply voltage. This

allows the TMP114 to work with a 1.2 V or 1.8 V I2C bus at any supported supply voltage.

8.3.2 Cyclic Redundancy Check (CRC)

The TMP114 implements an optional CRC function to improve data integrity and communication robustness

using an 8-bit polynomial that is checked during communication. By default the feature is disabled and can be

enabled by setting the CRC_EN bit in the Configuration register.

When enabled, the CRC function starts with the seed value of FFh at every start or repeated start condition on

the bus and computes one CRC value. After transmitting or receiving a CRC value the TMP114, the next CRC

will have the seed value reset to FFh.

When the TMP114 operates in target receive mode or during a write bus transaction, the CRC byte covers the

device address, pointer address, and received data bytes. If the device detects a CRC error on the byte, it

shall set the CRC_flag status bit in the Alert_Status register. If the CRC byte is not present, the transaction is

discarded and the CRC flag is not set.

When the TMP114 operates in target transmit mode or during a read bus transaction, the CRC byte covers the

device address and the sent data bytes.

8.3.3 Temperature Limits

TMP114 includes an on-board temperature limit warning. At the end of every completed conversion, the TMP114

compares the result against the limits stored in the low limit register and the high limit register. When the

results exceed the THigh_Limit register value, the THigh_Status and THigh_Flag bits are set. Upon read, the

THigh_Flag will clear but the THigh_Status bit will remain set. After the measured temperature crosses below

the THigh_Limit - THigh_Hyst value, the THigh_Status bit will clear and the THigh_Flag bit is set again to

indicate a change in the temperature with respect to the limits.

If the controller is unable to read the Temp_Result register for a prolonged period of time, the flag bits can be

used to determine if a thermal limit was crossed during that time. The flag bits will only clear after a successful

Alert_Status register read, therefore the high and low flags can help determine if the system crossed the

thermal limit before an I2C read could be performed. The Status bits will automatically update with changing

Temp_Result values. Figure 8-1 depicts this behavior.

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TMP114

SNIS214A – JUNE 2021 – REVISED SEPTEMBER 2021

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