IR2153Z datasheet(2/6 Pages) IRF

2 / 6 page

IR2153Z

www.irf.com

Dynamic Electrical Characteristics

VBIAS (VCC, VBS) = 12V, CL = 1000 pF and TA = 25°C unless otherwise specified.

Recommended Operating Conditions

The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the

recommended conditions. The VS offset rating is tested with all supplies biased at 15V differential.

structure between the chip VCC and COM which has a nominal breakdown voltage of 15.6V. Therefore, the IC

supply voltage is normally derived by forcing current into the supply lead (typically by means of a high value

resistor connected between the chip VCC and the rectified line voltage and a local decoupling capacitor from

VCC to COM) and allowing the internal zener clamp circuit to determine the nominal supply voltage. There-

fore, this circuit should not be driven by a DC, low impedance power source of greater than VCLAMP.

Note 1:

Because of the IR2153’s application specificity toward off-line supply systems, this IC contains a zener clamp

Symbol

Definition

Min.

Typ. Max. Units Test Conditions

Turn-On Rise Time

—

165

Turn-Off Fall Time

—

100

tsd

Shutdown Propagation Delay

—

660

—

Deadtime

—

1.2

—

µs

DRT Duty Cycle

—

Symbol

Definition

Min.

Max.

Units

High Side Floating Supply Absolute Voltage

VS + 10

VS + 20

High Side Floating Supply Offset Voltage

—

600

VHO

High Side Floating Output Voltage

VLO

Low Side Output Voltage

VCC

ICC

Supply Current (Note 1)

—

Typical Connections

VCC

COM

600V

MAX

Shutdown

IR2153Z

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