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MCIMX503CVM8B датащи(PDF) 94 Page - NXP Semiconductors |
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MCIMX503CVM8B датащи(HTML) 94 Page - NXP Semiconductors |
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94 / 136 page ![]() i.MX50 Applications Processors for Consumer Products, Rev. 7 Electrical Characteristics Freescale Semiconductor 94 4.9.9.3 SSI Transmitter Timing with External Clock Figure 53 depicts the SSI transmitter external clock timing and Table 68 lists the timing parameters for the transmitter timing with external clock. Figure 53. SSI Transmitter External Clock Timing Diagram Table 68. SSI Transmitter Timing with External Clock ID Parameter Min Max Unit External Clock Operation SS22 (Tx/Rx) CK clock period 81.4 — ns SS23 (Tx/Rx) CK clock high period 36.0 — ns SS24 (Tx/Rx) CK clock rise time — 6.0 ns SS25 (Tx/Rx) CK clock low period 36.0 — ns SS26 (Tx/Rx) CK clock fall time — 6.0 ns SS27 (Tx) CK high to FS (bl) high –10.0 15.0 ns SS29 (Tx) CK high to FS (bl) low 10.0 — ns SS31 (Tx) CK high to FS (wl) high –10.0 15.0 ns SS33 (Tx) CK high to FS (wl) low 10.0 — ns SS37 (Tx) CK high to STXD valid from high impedance — 15.0 ns SS38 (Tx) CK high to STXD high/low — 15.0 ns SS45 SS33 SS24 SS26 SS25 SS23 Note: SRXD Input in Synchronous mode only SS31 SS29 SS27 SS22 SS44 SS39 SS38 SS37 SS46 TXC (Input) TXFS (bl) (Input) TXFS (wl) (Input) TXD (Output) RXD (Input) |
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