8.4.4 High-speed Downstream Port Electrical Compliance Test Mode

TUSB216-Q1 will detect HS compliance test fixture and enter downstream port high-speed eye diagram test

mode. CD pin will be low and ENA_HS pin is asserted high when TUSB216-Q1 is in HS eye compliance test

mode.

If RSTN pin is asserted low and de-asserted high while TUSB216-Q1 is operating in HS functional mode,

TUSB216-Q1 will transition to HS eye compliance test mode and CD asserts low and ENA_HS remains high.

When this occurs signal compensation is enabled.

8.4.5 Shutdown Mode

TUSB216-Q1 can be disabled when its RSTN pin is asserted low. DP, DM traces are continuous through the

device in shutdown mode. The USB channel is still fully operational, but there is neither signal compensation,

nor any indication from the CD pin as to the status of the channel.

Table 8-1. CD and ENA_HS Pins in Different Modes

MODE

CD

ENA_HS

Low-speed

HIGH

LOW

Full-speed

HIGH

LOW

High-speed

HIGH

HIGH

High-speed downstream port electrical test

LOW

HIGH

Shutdown

LOW

LOW

TUSB216-Q1 supports 100 KHz I2C for device configuration, status read back and test purposes. For detail

electrical and functional specifications refer to I2C Bus Specification 2.1, 2001 – STANDARD MODE. This

controller is enabled after SCL and SDA pins are sampled high shortly after return from shutdown. In this

mode, the CSR can be accessed by I2C read/write transaction to 7-bit slave address 0x2C. It is advised to set

CFG_ACTIVE bit before changing values. This halts the FSM, and reset it after all changes are made. This

ensure proper startup into high-speed mode.

8.4.7 BC 1.2 Battery Charging Controller

The TUSB216-Q1 main function is a signal conditioner offering the boost and pre-equalization features to

the incoming DP/DM signals. For applications in which USB host or hub does not provide USB BC charging

controller functionality, the TUSB216-Q1 can perform this task when CDP_ENZ is low and BC 1.2 CDP

Controller is enabled. When battery charging CDP controller feature is enabled (CDP_ENZ=low) TUSB216-Q1

supports CDP charging downstream port functionality. CDP_ENZ has an internal pull up when the pin is left

unconnected CDP controller will be disabled.

Table 8-2. TUSB216-Q1 Battery Charging Controller Modes

Pin 11 (CDP_ENZ)

CDP

High

NO

Low

YES

8.5 TUSB216 Registers

Table 8-3 lists the memory-mapped registers for the TUSB216 registers. All register offset addresses not listed in

Table 8-3 should be considered as reserved locations and the register contents should not be modified.

Table 8-3. TUSB216 Registers

Offset

Acronym

Register Name

Section

0x1

EDGE_BOOST

This register is setting EDGE BOOST level.

Go

0x3

CONFIGURATION

This register is selecting device mode.

Go

0xE

DC_BOOST

This register is setting DC BOOST level.

Go

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TUSB216-Q1

SLLSF03A – APRIL 2019 – REVISED SEPTEMBER 2021

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Product Folder Links: TUSB216-Q1