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TUSB216 датащи(PDF) 4 Page - Texas Instruments |
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TUSB216 датащи(HTML) 4 Page - Texas Instruments |
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4 / 33 page ![]() 6 Pin Configuration and Functions 4 SDA 3 5 6 9 10 11 12 1 8 7 SCL/CD RSTN BOOST D2P D2M RX_SEN/ENA_HS GND CDP_ENZ VCC D1M D1P 2 Not to scale Figure 6-1. TUSB216-Q1 RWB 12-Pin X2QFN Top View Table 6-1. Pin Functions PIN I/O INTERNAL PULLUP/PULLDOWN DESCRIPTION NAME NO. BOOST 6 I N/A USB High-speed boost select via external pull down resistor. Both edge boost and DC boost are controlled by a single pin in non- I2C mode. In I2C mode edge boost and DC boost can be individually controlled. Sampled upon power up. Does not recognize real time adjustments. Auto selects BOOST LEVEL = 3 when left floating. CDP_ENZ 11 I 500 kΩ PU Set CDP_ENZ is low to enable BC 1.2 CDP controller RX_SEN2/ENA_HS 9 I/O N/A In I2C mode: Reserved for TI test purpose. In non-I2C mode: At reset: 3-level input signal RX_SEN. USB High-speed RX Sensitivity Setting to Compensate ISI Jitter H (pin is pulled high) – high RX sensitivity (high loss channel) M (pin is left floating) – medium RX sensitivity (medium loss channel) L (pin is pulled low) – low RX sensitivity (low loss channel) After reset: Output signal ENA_HS. Flag indicating that channel is in High-speed mode. Asserted upon: 1. Detection of USB-IF High-speed test fixture from an unconnected state followed by transmission of USB TEST_PACKET pattern. 2. Squelch detection following USB reset with a successful HS handshake [HS handshake is declared to be successful after single chirp J chirp K pair where each chirp is within 18 μs – 128 μs]. D2P 7 I/O N/A USB High-speed positive port. TUSB216-Q1 SLLSF03A – APRIL 2019 – REVISED SEPTEMBER 2021 www.ti.com 4 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TUSB216-Q1 |
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