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High Speed CMOS Logic – 74HC240

Rev 1.1

30/11/21

Switching Waveforms continued

Figure 2 – Propagation Delay - Output Enable to Output 1Y or 2Y

Test Circuit

TESTING

CONNECT TO GND WHEN

TESTING

DUT

OUTPUT

TEST POINT

* Includes all probe and jig capacitance

1kΩ

Figure 3

any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Silicon Supplies Ltd

hereby disclaims any and all warranties and liabilities of any kind.

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