DS1689SSLASHT&R datasheet(33/36 Pages) MAXIM

33 / 36 page

DS1689/DS1693

33 of 36

NOTES:

1) All voltages are referenced to ground.

2) Typical values are at +25

°C and nominal supplies.

3) Outputs are open.

4) Value for voltage and currents is from the VCCI input pin to the VCCO pin.

5) Write protection trip point occurs during power fail prior to switchover from VCC to VBAT.

6) Value for voltage and currents is from the VBAT input pin to the VCCO pin.

7) Applies to the AD0–AD7 pins, and the SQW pin when each is in a high impedance state.

8) The

IRQ pin is open drain.

9) Measured with a load of 50pF + 1 TTL gate.

10) Wake-up/kickstart timeout generated only when the oscillator is enabled and the countdown chain is

not reset.

11) VSW is determined by the larger of VBAT and VBAUX.

12) ZCE is an average input to output impedance as the input is swept from GND to VCCI and less than

4mA is forced through ZCE.

13) The DS1693 keeps time to an accuracy of

±1 minute per month during data retention time for the

period of tDR.

14) tDR is the amount of time that the internal battery can power the internal oscillator and internal

registers of the DS1693. As such, tDR is specified with VCCO floating. If VCCO is powering an external

SRAM, an auxiliary battery must be connected to the VBAUX pin. The auxiliary battery should be sized

such that it can power the external SRAM for the tDR period.

15) The

CEI pin has an internal pullup of 60k

Ω.

16) The PSEL pin has an internal pulldown of 60k

Ω.

17) For industrial grade parts, IBAT (with OSC off) limit increases to 250nA.

18) Real-time clock modules can be successfully processed through conventional wave-soldering

techniques as long as temperature exposure to the lithium energy source contained within does not

exceed +85

°C. Post solder cleaning with water washing techniques is acceptable, provided that

ultrasonic vibration is not used.

DS1689S/T&R датащи(PDF) 33 Page - Maxim Integrated Products