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SH7041A датащи(PDF) 276 Page - Renesas Technology Corp

номер детали SH7041A
подробное описание детали  Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)
PDF  923 Pages
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производитель  RENESAS [Renesas Technology Corp]
домашняя страница  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7041A датащи(HTML) 276 Page - Renesas Technology Corp

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Data buffer
Memory
Transfer source
module
Transfer destination
module
Memory
Transfer source
module
Transfer destination
module
SAR
DAR
Data buffer
SAR
DAR
The SAR value is taken as the address, and data is read from the transfer source
module and stored temporarily in the DMAC.
1st bus cycle
2nd bus cycle
The DAR value is taken as the address, and data stored in the DMAC's data
buffer is written to the transfer destination module.
DMAC
DMAC
Figure 11.7 Direct Address Operation during Dual Address Mode



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