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SH7041A датащи(PDF) 92 Page - Renesas Technology Corp

номер детали SH7041A
подробное описание детали  Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)
PDF  923 Pages
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производитель  RENESAS [Renesas Technology Corp]
домашняя страница  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7041A датащи(HTML) 92 Page - Renesas Technology Corp

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54
Table 2.8
Addressing Modes and Effective Addresses (cont)
Addressing
Mode
Instruction
Format
Effective Addresses Calculation
Equation
Indirect indexed
GBR addressing
@(R0, GBR)
The effective address is the GBR value plus the R0.
GBR
R0
GBR + R0
+
GBR + R0
PC relative
addressing with
displacement
@(disp:8,
PC)
The effective address is the PC value plus an 8-bit
displacement (disp). The value of disp is zero-
extended, and is doubled for a word operation, and
quadrupled for a longword operation. For a
longword operation, the lowest two bits of the PC
value are masked.
PC
H'FFFFFFFC
PC + disp
× 2
or
PC & H'FFFFFFFC
+ disp
× 4
+
2/4
×
&
(for longword)
disp
(zero-extended)
Word: PC +
disp
× 2
Longword:
PC &
H'FFFFFFFC
+ disp
× 4



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