LTC4292 datasheet(13/40 Pages) AD

13 / 40 page

LTC4291-1/LTC4292

Rev 0

For more information www.analog.com

PIN FUNCTIONS

LTC4292

VEE (Pins 31, 33, 40, Exposed Pad Pin 41): Main PoE

Supply Input. Connect to a –51V to –57V supply, relative

to AGNDP. Voltage depends on PSE Type (Type 3 or 4).

GATEnM (Pins 1, 3, 7, 9, 22, 24, 28, 30): Gate Drive,

Port n, Channel M. Connect GATEnM to the gate of

the external MOSFET for port n, channel M. When the

MOSFET is turned on, the gate voltage is driven to

12V (typ) above VEE. During a current limit condition, the

voltage at GATEnM will be reduced to maintain constant

current through the external MOSFET. If the fault timer

expires, GATEnM is pulled down, turning the MOSFET off

and raising a port n fault event. If the channel is unused,

the GATEnM pin must be floated.

OUTnM (Pins 2, 4, 8, 10, 21, 23, 27, 29): Output Voltage

Monitor, Port n, Channel M. Connect OUTnM to the output

channel. A current limit foldback circuit limits the power

dissipation in the external MOSFET by reducing the cur-

rent limit threshold when the drain-to-source voltage

exceeds 10V. The port n power good event is raised when

the voltage from OUTnM to VEE drops below 2.4V (typ).

A 500k resistor is connected internally from OUTnM to

AGNDP when the channel is idle. If the channel is unused,

the OUTnM pin must be floated.

CAP2 (Pin 6): Analog Internal 4.3V Power Supply Bypass

Capacitor. Connect a 0.22µF ceramic cap to VEE.

PWRMDn (Pins 11, 20): Maximum Power Mode Input.

Logic input signals between VEE and VEE + 4.3V for config-

uration of maximum output power per-port in auto mode.

See Auto Mode Maximum PSE Power section. Internally

pulled up to CAP2.

SENSEnM (Pins 12, 13, 14, 15, 16, 17, 18, 19): Current

Sense Input, Port n, Channel M. SENSEnM monitors

the external MOSFET current via a 0.15Ω sense resistor

between SENSEnM and VSSKn. Whenever the voltage

across the sense resistor exceeds the overcurrent detection

threshold VCUT-2P, the current limit fault timer counts up. If

the voltage across the sense resistor reaches the current

limit threshold VLIM-2P, the GATEnM pin voltage is lowered

to maintain constant current in the external MOSFET. See

Applications Information for further details. If the channel

is unused, the SENSEnM pin must be tied to VEE.

AGNDP (Pin 25): Analog Ground. Connect AGNDP to the

return for the VEE supply through a 10Ω resistor.

DNA (Pin 36): Data Transceiver Negative Input Output

(Analog). Connect to DND through a data transformer.

DPA (Pin 37): Data Transceiver Positive Input Output

(Analog). Connect to DPD through a data transformer.

CNA (Pin 38): Clock Transceiver Negative Input Output

(Analog). Connect to CND through a data transformer.

CPA (Pin 39): Clock Transceiver Positive Input Output

(Analog). Connect to CPD through a data transformer.

VSSK12 (Pin 5): Kelvin Sense to VEE. Connect to sense

resistor common node for ports 1 and 2 through a 0.15Ω

resistor. Connect to AGNDP through a 0.22μF, 100V

capacitor. Do not connect directly to VEE plane. See Layout

Requirements.

VSSK34 (Pin 26): Kelvin Sense to VEE. Connect to sense

resistor common node for ports 3 and 4 through a 0.15Ω

resistor. Connect to AGNDP through a 0.22μF, 100V

capacitor. Do not connect directly to VEE plane. See Layout

Requirements.

Common Pins

NC, DNC (LTC4291-1 Pins 7, 13; LTC4292 Pins 32, 34,

35): All pins identified with “NC” or “DNC” must be left

unconnected.

LTC4291-1

AD0 (Pin 1): Address Bit 0. Tie the address pins high or

low to set the I2C serial address to which the LTC4291-1

responds. The address will be (010A3A2A1A0)b. Internally

pulled up to VDD.

AD1 (Pin 2): Address Bit 1. See AD0.

AD2 (Pin 3): Address Bit 2. See AD0.

AD3 (Pin 4): Address Bit 3. See AD0.

4PVALID (Pin 6): 4-Pair Valid Input, Active Low. When

low, the LTC4291-1/LTC4292 will not apply power to a

port unless both pairsets present a valid signature. When

high, the LTC4291-1/LTC4292 will power any pairset pre-

senting a valid signature, regardless of the other pairset.

Internally pulled down to DGND.

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