ADF4212LBRU datasheet(2/20 Pages) AD

2 / 20 page

REV. 0

–2–

ADF4212L–SPECIFICATIONS1 (V

DD1 = VDD2 = 2.7 V to 3.3 V; VP1, VP2 = VDD to 5.5 V; AGNDRF = DGNDRF =

AGNDIF = DGNDIF = 0 V; TA = TMIN to TMAX, unless otherwise noted; dBm referred to 50

B Chips2

Parameter

B Version

(Typical)

Unit

Test Conditions/Comments

RF/IF CHARACTERISTICS

RF Input Frequency (RFIN)

0.2/2.4

GHz min/max

For Operation below FMIN, Use a Square Wave

RF Input Sensitivity

–10/0

dBm min/max

VDD = 3 V

IF Input Frequency (IFIN)

100/1000

MHz min/max

IF Input Sensitivity

–10/0

dBm min/max

VDD = 3 V

MAXIMUM ALLOWABLE

Prescaler Output Frequency

200

MHz max

REFIN CHARACTERISTICS

See Figure 2 for Input Circuit.

REFIN Input Frequency

10/150

MHz min/max

REFIN Input Sensitivity

–5

dBm min

AC-Coupled. When DC-Coupled,

0 to VDD Max (CMOS-Compatible)

REFIN Input Capacitance

pF max

REFIN Input Current

±100

µA max

PHASE DETECTOR

Phase Detector Frequency4

MHz max

CHARGE PUMP

ICP Sink/Source

Programmable: See Table V.

High Value

mA typ

With RSET = 2.7 k

Ω

Low Value

625

µA typ

Absolute Accuracy

% typ

With RSET = 2.7 k

Ω

RSET Range

1.5/5.6

Ω min/max

ICP Three-State Leakage Current

nA max

Sink and Source Current Matching

% typ

0.5 V < VCP < VP – 0.5 2% typ

ICP vs. VCP

22% typ

0.5 V < VCP < VP – 0.5

ICP vs. Temperature

% typ

VCP = VP/2

LOGIC INPUTS

VINH, Input High Voltage

1.4

V min

VINL, Input Low Voltage

0.6

V max

IINH/IINL, Input Current

±1

µA max

CIN, Input Capacitance

pF max

LOGIC OUTPUTS

VOH, Output High Voltage

1.4

V min

Open Drain 1 k

Ω Pull-Up to 1.8 V

VOL, Output Low Voltage

0.4

V max

IOL = 500

µA

POWER SUPPLIES

VDD1

2.7/3.3

V min/V max

VDD2VDD1VDD1

VP1, VP2VDD1/5.5

VDD1/5.5

V min/V max

IDD

5 (RF and IF)

mA max

7.5 mA Typical

RF Only

mA max

5.0 mA Typical

IF Only

mA max

2.5 mA Typical

IP (IP1 + IP2)

0.6

mA typ

Low Power Sleep Mode

µA typ

NOTES

1Operating temperature range is as follows: B Version: –40

°C to +85°C.

2The B Chip specifications are given as typical values.

3This is the maximum operating frequency of the CMOS counters. The prescaler value should be chosen to ensure that the RF input is divided down to a frequency

that is less than this value.

4Guaranteed by design. Sample tested to ensure compliance.

A = 25

°C. RF = 1 GHz. Prescaler = 32/33. IF = 500 MHz. Prescaler = 16/17.

Specifications subject to change without notice.

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