Spread Spectrum Clock Synthesizer

MDS 650-41 F

7

Revision 082305

Integrated Circuit Systems, Inc.

ICS650-41

AC Electrical Characteristics

Unless stated otherwise, VDD = 3.3 V ±5%, VDDO = 2.5 V ±5%, Ambient Temperature 0 to +85

° C

Note 1: Measured with 15 pF load.

Parameter

Symbol

Conditions

Min.

Typ.

Max.

Units

Input Frequency

Crystal or clock input

25

MHz

Spread Spectrum Modulation

Frequency

50

kHz

Duty Cycle

at VDD/2, Note 1 and

Figures 1 and 2

45

50

55

%

Output Fall Time

80% to 20%, Note 1

and Figures 1 & 3

1.5

ns

Output Rise Time

20% to 80%, Note 1

and Figures 1 & 3

1.5

ns

One Sigma Clock Period Jitter

Note 1

30

ps

Absolute Jitter, Peak-to-Peak

Deviation from mean,

SS_EN=0, Note1 &

Figures 1 and 6

±125

ps

Output Enable Time

PDTS high to PLL

locked to within 1% of

final value, Figure 5

2.5

5

ms

Output Disable Time

PDTS low to tri-state,

Figure 5

20

ns

Power-up Time

PLL lock-time from

power-up to 1% of final

value, Figure 4

610

ms