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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ICS1893AGLF датащи(PDF) 118 Page - Integrated Circuit Systems |
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ICS1893AGLF датащи(HTML) 118 Page - Integrated Circuit Systems |
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118 / 135 page  ICS1893AG, Rev A 04/14/05 April, 2005 118 Chapter 10 DC and AC Operating Conditions ICS1893AG Data Sheet - Preliminary Copyright © 2005, Integrated Circuit Systems, Inc. All rights reserved. 10.5.6 100M/MII Media Independent Interface: Synchronous Receive Timing Table 10-13 lists the significant time periods for the MII / 100M Stream Interface synchronous receive timing. The time periods consist of timings of signals on the following pins: • RXCLK • RXD[3:0] • RXDV • RXER Figure 10-7 shows the timing diagram for the time periods. Figure 10-7. MII Interface Synchronous Receive Timing Diagram Table 10-13. MII Interface: Synchronous Receive Timing Time Period Parameter Min. Typ. Max. Units t1 RXD[3:0], RXDV, and RXER Setup to RXCLK Rise 10.0 – – ns t2 RXD[3:0], RXDV, and RXER Hold after RXCLK Rise 10.0 – – ns t1 t2 RXCLK RXD[3:0] RXDV RXER |
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