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SLG46880 датащи(PDF) 92 Page - Dialog Semiconductor |
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SLG46880 датащи(HTML) 92 Page - Dialog Semiconductor |
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92 / 353 page ![]() Datasheet 25-Feb-2021 CFR0011-120-00 Revision 3.12 92 of 353 © 2021 Dialog Semiconductor SLG46880/81 GreenPAK Programmable Mixed-Signal Matrix with Asynchronous State Machine and Dual Supply Note: If low power BG is powered on/off by WS, the wake time should be longer than 2.1 ms. The BG/analog start up time will take maximal 2 ms. If low power BG is always on, OSC0 period is longer than required wake time. The short wake mode can be used to reduce the current consumption. To use any ACMPxH under WS controller the following settings must be done: ACMPxH Power Up Input from matrix = 1 (for each ACMPxH separately). Figure 58: Wake/Sleep Timing Diagram, Normal Wake Mode, Counter Set is Used Figure 59: Wake/Sleep Timing Diagram, Short Wake Mode, Counter Set is Used Normal ACMP Operation ACMP follows input Sleep Mode ACMP Latches New Data Data is latched BG/Analog Startup time* Force Sleep Sleep Mode ACMP Latches Last Data BG/Analog_Good (internal signal) ACMP_PD is High (From Connection Matrix) CNT_SET (From Connection Matrix) CNT0_out (To Connection Matrix) time between Reset goes low and 1st WS clock rsing edge WS_out (internal signal) Note: CNT0_out is a delayed WS_out signal for 1us to make sure the data is correct during latch. Sleep Mode ACMP Latches New Data Data is latched BG/Analog Startup time* Normal ACMP Operation for short time ACMP follows inout Force Sleep Sleep Mode ACMP Latches Last Data BG/Analog_Good (internal signal) ACMP_PD is High (From Connection Matrix) CNT_RST (From Connection Matrix) CNT0_out (To Connection Matrix) time between Reset goes low and 1st WS clock rsing edge WS_out (internal signal) Note: CNT0_out is a delayed WS_out signal for 1us to make sure the data is correct during latch. |
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