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AT25SL641 датащи(PDF) 42 Page - Dialog Semiconductor

номер детали AT25SL641
подробное описание детали  64-Mbit, 1.7V Minimum SPI Serial Flash Memory with Dual I/O, Quad I/O and QPI Support
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AT25SL641 датащи(HTML) 42 Page - Dialog Semiconductor

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AT25SL641
DS-25SL641–113F–12/2018
7.25
Read Manufacturer / Device ID (90h)
The Read Manufacturer/ Device ID instruction provides both the JEDEC assigned manufacturer ID and the specific
device ID. This instruction can be issued in both SPI mode and QPI mode. In SPI mode, the 90h instruction is called a
1-1-1 transfer, where the instruction, address, and data are all driven on a single pin (SI for instruction and address, and
SO for data). In QPI mode, the 90h instruction is called a 4-4-4 transfer, where the instruction, address, and data are
driven on the bidirectional IO0 - IO3 pins.
Note that in QPI mode, the following events must occur in the order shown.
1.
Set the QE bit in Status Register-2
2.
Execute the QPI Enable (38h) instruction
3.
Execute the 90h instruction
In SPI mode, the operation is initiated by driving the CS pin low and then driving the instruction code 90h onto the SI pin,
followed by a 24-bit address (A23-A0) of 000000h. The 90h instruction requires 8 clocks to transfer, and the 24-bit
address requires 24 clocks to transfer. The Manufacturer ID for Adesto (1Fh) and the Device ID (17h) are shifted out on
the SO pin on the falling edge of SCK with most significant bit (MSB) first. A minimum or 16 clocks are required to
transfer the manufac turer and device ID information. If the 24-bit address is initially set to 000001h the Device
ID is read first and then followed by the Manufacturer ID. The Manufacturer and Device ID can be read continuously,
alternating from one to the other. The instruction is completed by driving CS high.
In QPI mode, the SI, SO, WP, and HOLD pins are configured as bidirectional pins IO
0, IO1, IO2, and IO3 respectively. The
90h operation the operation is initiated by driving the CS pin low and then driving the instruction code 90h onto the IO
0 -
IO
3 pins, followed by a 24-bit address (A23-A0) of 000000h. The 90h instruction requires 2 clocks to transfer, and the
24-bit address requires 6 clocks to transfer. The Manufacturer ID for Adesto (1Fh) and the Device ID (17h) are shifted
out on the bidirectional IO
0 - IO3 pins on the falling edge of SCK, with most significant bit (MSB) first. A m i n i m u m o r 4
clocks are required to transfer the manufacturer and device ID information. If the 24-bit address is initially
set to 000001h the Device ID is read first and then followed by the Manufacturer ID. The Manufacturer and Device ID
can be read continuously, alternating from one to the other. The instruction is completed by driving CS high.
Figure 7-41 shows the 90h command as executed in SPI mode. In this mode the instruction and address are driven on
the SI pin.
Figure 7-42 shows the 90h command as executed in QPI mode. In this mode the instruction and address are driven on all
four I/O pins.



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