STW8019 datasheet(24/55 Pages) STMICROELECTRONICS

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Control registers

STw8009/STw8019

24/55

syncin_ad[1:0]: Adjustment of incoming sync signals.

Used to insure correct interpretation of incoming video samples as Y, Cr or Cb when the

encoder is slaved to incoming sync signals (inc. ‘F/H’ flags stripped off ITU-R656/D1 data).

syncout_ad[1:0]: Adjustment of outgoing sync signals.

Used to ensure correct interpretation of incoming video samples as Y, Cr or Cb when the

encoder is master and supplies sync signals.

aline: video active line duration control

(*) 0 = Full digital video line encoding (720 pixels - 1440 clock cycles)

1 = Active line duration follows ITU-R/SMPTE ‘analog’ standard requirements

hue_en: Enables variance in phase of the subcarrier, as programmed in register_105,

during active video with respect to the phase of the subcarrier during the color burst. Once

set, this bit is automatically reset to ‘0’.

(*) 0 = Disabled

1 = Enabled

configuration4

Address: 0x0004

Type: R/W

content

syncin_

ad1

syncin_

ad0

syncout_

ad1

syncout_

ad0

aline

hue_en

xxx

default

0000

Table 7.

syncin_ad[1:0]

syncin_ad1

syncin_ad0

Internal delay undergone by incoming sync

(*)

nominal*

+1 pix_clk

+2 pix_clk

+3 pix_clk

Table 8.

syncout_ad[1:0]

syncout_ad1

syncout_ad0

Delay added to sync signals before they are output

(*)

nominal*

+1 pix_clk

+2 pix_clk

+3 pix_clk

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