LT8331 datasheet(12/24 Pages) AD

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LT8337/LT8337-1

Rev. 0

For more information www.analog.com

APPLICATIONS INFORMATION

Light Load Current Operation—Burst Mode Operation

or Pulse-Skipping

To enhance the efficiency at light loads, the LT8337/

LT8337-1 features operate in low ripple Burst Mode

operation. When the IC is enabled for Burst Mode opera-

tion, the minimum peak inductor current is set to approxi-

mately 1.2A even though the VC node Block Diagram)

indicates a lower value. In this condition, the IC maintains

the output regulation voltage by reducing the switching

frequency instead of reducing the inductor peak current.

In light load Burst Mode operation the IC delivers single

pulses of current to the output capacitor followed by sleep

periods during which the output power is supplied by

the output capacitor. This low ripple Burst Mode opera-

tion minimizes the input quiescent current and minimizes

output voltage ripple.

As the output load decreases, the frequency of single cur-

rent pulses decreases and the percentage of time the IC

is in sleep mode increases, resulting in much higher light

load efficiency than for typical converters. By maximizing

the time between pulses, the converter VIN pin quiescent

current approaches 4µA (LT8337) or 23µA (LT8337-1)

for a typical application when there is no output load.

To optimize the quiescent current performance at light

loads, the current in the feedback resistor divider should

be minimized as it appears to the output as load current.

In order to achieve higher light load efficiency, more

energy should be delivered to the output during the single

small pulses in Burst Mode operation such that the IC can

stay in sleep mode longer between each pulse. This can

be achieved by using a larger value inductor. For example,

while a smaller inductor value would typically be used for

a high switching frequency application, if high light load

efficiency is desired, a larger inductor value should be

chosen. See the Burst Mode Efficiency vs Inductor Value

curve in the Typical Performance Characteristics section

for more information.

Programming VIN Turn-On and Turn-Off Thresholds

with the EN/UVLO Pin

The falling threshold voltage and rising hysteresis voltage

of the EN/UVLO pin can be calculated by Equation 1.

VVIN,FALLING = 1.0V •

(R3 + R4)

VVIN,RISING = 90mV • (R3 + R4)

+ VVIN,FALLING

(1)

When in Burst Mode operation with light load currents,

the current through the resistor network R3 and R4 can

easily be greater than the supply current consumed by the

IC. Therefore, large resistors can be used for R3 and R4

to minimize their effect on efficiency at light loads.

EN/UVLO pin can be tied to VIN if the shutdown feature

is not used, or alternatively, the pin may be tied to a logic

level if shutdown control is required. The IC draws a low

VIN quiescent current of 0.3µA (typical) When EN/UVLO

is below 0.15V.

INTVCC Regulator

An internal low dropout (LDO) regulator produces the

3.5V supply from VIN that powers the drivers and the

internal bias circuitry. The INTVCC pin must be bypassed

to ground with a minimum of 1μF ceramic capacitor.

Good bypassing is necessary to supply the high tran-

sient currents required by the power MOSFET gate driv-

ers. Applications with high VIN voltage and high switching

frequency increase die temperature because of the higher

power dissipation across the LDO. When VIN is lower than

2.95V for LT8337 or 2.90V for LT8337-1, the maximum

programmable switching frequency is lower due to the

voltage drop across the LDO. See the Max Programmable

Switching Frequency vs Input Voltage curve in the Typical

Performance Characteristics section for more informa-

tion. Do not connect an external load to the INTVCC pin.

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