LT8331 datasheet(9/24 Pages) AD

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LT8337/LT8337-1

Rev. 0

For more information www.analog.com

PIN FUNCTIONS

SYNC/MODE (Pin 1): External Synchronization Input and

Mode Selection Pin. This pin allows five selectable modes

for optimization of performance:

SYNC/MODE PIN INPUT

CAPABLE MODE(S) OF OPERATION

(1) GND or <0.1V

Burst

(2) 50k Resistor to GND

Burst/SSFM

(3) Float (Pin Open)

Pulse-Skipping

(4) INTVCC or > (INTVCC–0.2V)

Pulse-Skipping/SSFM

(5) External Clock

Pulse-Skipping/Sync

where the selectable modes of operation are:

Burst = low IQ, (low output ripple operation at light loads)

Pulse-Skipping=skippedpulse(s)atlightload(alignedclock)

SSFM = spread spectrum frequency modulation for low EMI

Sync = switching frequency synchronized to external clock.

The LT8337/LT8337-1 automatically selects pulse-skip-

ping mode with no spread spectrum frequency modu-

lation during start-up, and The SYNC/MODE pin input

configurations (1) through (4) are ignored.

The LT8337/LT8337-1 automatically select low IQ opera-

tion in the PassThru mode operation, and all the SYNC/

MODE pin input configurations are ignored.

RT (Pin 2): Switching Frequency Adjustment Pin. The

LT8337/LT8337-1 switching frequency is programmed

by connecting a resistor of the appropriate value from the

RT pin to GND at Pin 3. See the Applications Information

section for more detail. Do not leave the RT pin open.

GND (Pins 3, 5, 8, Exposed Pad Pin 17): Ground. The

exposed pad should be soldered to the PCB ground plane

for good thermal and electrical performance. See the

Applications Information section for sample layout.

FB (Pin 4): Feedback Input Pin. This pin receives the feed-

back voltage from the external resistor divider between

VOUT and Pin 3 GND. FB pin is one input to the error

amplifier of the output voltage control loop. See the

Applications Information section for sample layout.

VOUT (Pins 6, 7): Output Pins. Connect one 1µF capaci-

tor between VOUT at Pin 6 and GND at Pin 5 only, and a

matching 1µF capacitor between VOUT at Pin 7 and GND

at Pin 8 only. These two capacitors complete the Silent

Switcher configuration and must be placed as close to

the IC as possible to achieve lowest EMI. Additional bulk

capacitors of 2.2µF or more should be placed close to

the IC with the positive terminals connected to VOUT, and

negative terminals connected to ground plane. See the

Applications Information section for a sample layout.

SW (Pins 9, 10, 11): The SW pins are the outputs of

the internal power switches. Tie these pins together and

connect them to the inductor and one side of the boost

capacitor CBST.

BST (Pin 12): Top Switch Gate Driver Supply Pin. Place

a 0.1µF capacitor (CBST) between the BST and SW pins

and close to the IC.

VIN (Pin 13): Input Supply Pin. This pin must be con-

nected to the input of the power stage (the inductor’s

input terminal).

EN/UVLO (Pin 14): Enable and Input Undervoltage

Lockout Pin. The IC is shut down when this pin is below

1V (typical). The IC draws a low VIN current of 0.3μA

(typical) when this pin is below 0.15V. The IC is enabled

when this pin is above 1.0V (typical). A resistor divider

from VIN to GND can be used to program a VIN threshold

below which the IC is shut down. See the Applications

Information section for further details. Tie EN/UVLO to

VIN if the shutdown feature is not used.

INTVCC (Pin 15): Internal 3.5V Regulator Bypass Pin.

This pin provides supply for internal drivers and control

circuits. The bypass capacitor for INTVCC should be con-

nected to the ground plane. Do not load the INTVCC pin

with external circuitry. This pin must be bypassed with a

1µF or larger low ESR ceramic capacitor placed close to

the pin.

PG (Pin 16, LT8337 Only): Power Good Indicator. Open-

drain logic output that is pulled to ground when the output

voltage is greater than ±8% outside the regulated volt-

age. PG is also pulled to ground when EN/UVLO is below

1V, INTVCC has fallen too low, or the IC enters thermal

shutdown.

VC (Pin 16, LT8337-1 Only): Error Amplifier Output and

Switch Regulator Compensation Pin. Connect this pin to

appropriate external RC network to compensate the regu-

lator loop frequency response.

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