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MPC880CZP133 датащи(PDF) 7 Page - NXP Semiconductors |
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MPC880CZP133 датащи(HTML) 7 Page - NXP Semiconductors |
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7 / 87 page ![]() MPC885/MPC880 PowerQUICC Hardware Specifications, Rev. 7 Freescale Semiconductor 7 Features • 1.8-V core and 3.3-V I/O operation • The MPC885/MPC880 comes in a 357-pin ball grid array (PBGA) package The MPC885 block diagram is shown in Figure 1. Figure 1. MPC885 Block Diagram Serial Interface I2C SPI SMC2 SMC1 SCC2 Serial Interface SCC4/ UTOPIA SCC3 USB Time-Slot Assigner Bus System Interface Unit (SIU) Embedded Parallel I/O Memory Controller 4 Timers Interrupt Controllers 8-Kbyte Dual-Port RAM System Functions 8-Kbyte Instruction Cache 32-Entry ITLB Instruction MMU 8-Kbyte Data Cache 32-Entry DTLB Data MMU Instruction Bus Load/Store Bus Unified 4 Baud Rate Generators Parallel Interface Internal Bus Interface Unit External Bus Interface Unit Timers 32-Bit RISC Controller and Program ROM MPC8xx Processor Core PCMCIA-ATA Interface Virtual IDMA and Serial DMAs Security Engine AESU DEU MDEU Controller Channel DMAs DMAs FIFOs 10/100 MIII/RMII BaseT Media Access Control Fast Ethernet Controller Slave/Master IF DMAs Port |
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