MCP3565R datasheet(59/108 Pages) MICROCHIP

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DS20006401C-page 59

MCP3565R

5.15 Scan Mode

5.15.1

SCAN MODE PRINCIPLE

In Scan mode, the device sequentially and

automatically converts a list of predefined differential

inputs (also referred to as input channels) in a defined

order. After this series of conversions, the ADC can be

placed in Standby or ADC Shutdown mode, or it can

wait a certain time in order to perform the same

sequence of conversions periodically.

This mode is useful for applications that require

constant monitoring of defined channels or internal

resources (like AVDD or VCM) and allows a minimal

and simplified communication.

When in Scan mode, the MUX register (address: 0x6)

becomes a Don’t Care register.

Scan mode includes a configurable delay between

each Scan cycle, as well as a configurable delay

between each conversion within a Scan cycle.

Each conversion within the Scan cycle leads to a data

ready interrupt and to an update of the ADCDATA

The device does not include additional memory to

retain all Scan cycle A/D conversion results. Therefore,

each result has to be read when it is available and

before it is overwritten by the next conversion result.

5.15.2

SCAN MODE ENABLE AND SCAN

CHANNEL SELECTION

The ADC is, by default, in MUX mode at power-up. The

ADC enters Scan mode as soon as one of the

SCAN[15:0] bits in the SCAN register is set to ‘1’. MUX

mode and Scan mode cannot be enabled at the same

time. When SCAN[15:0] = 0x0000, Scan mode is

disabled and the part returns to MUX mode, where the

input channel selection is defined by the MUX[7:0] bits.

The Scan cycle conversions are effectively started as

soon as the ADC_MODE[1:0] bits are programmed

through the SPI interface to ‘11’ (Direct Write or Fast

command, ADC reset and restart). After the

ADC_MODE[1:0] bits are set to ‘11’, they keep the same

value until the Scan mode is completed or aborted.

Each SCAN[15:0] bit defines a possible input channel for

the Scan cycle, which corresponds to a certain selection

of the analog multiplexer input channel and possibly a

certain predefined gain of the ADC. The Scan cycle will

process and convert each channel that has been enabled

(SCAN[n] = 1) with a defined order of priority, from MSb to

LSb (SCAN[15] to SCAN[0]). The list of channels with

their corresponding inputs is defined in Table 5-15.

When using DATA_FORMAT[1:0] = 11, each channel

conversion result in the Scan sequence can be identi-

fied with a Channel ID (CH_ID[3:0]) code that will

appear in the four MSbs of the ADCDATA register

output value (

Section 5.6 “ADC Output Data For-

mat”). The Channel ID indicates the channel that

sends the output data. Table 5-15 shows each possible

Channel ID value and its associated channel.

TABLE 5-15: ADC CHANNEL SELECTION

SCAN[n]

Bit

Channel Name

Channel ID

MUX[7:0]

Corresponding Setting

Specific ADC Gain

OFFSET

1111

0x88

None

VCM

1110

0xF8

AVDD

1101

0x98

0.33x

TEMP

1100

0xDE

Differential Channel A (CH0-CH1)

1000

0x01

None

Single-Ended Channel CH1

0001

0x18

None

Single-Ended Channel CH0

0000

0x08

None

Note 1: SCAN[11:9] and SCAN[7:2] are not available for the MCP3565R, as it is a 2-channel device. These bits

must remain set to ‘0’.

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