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LM3204TL датащи(PDF) 13 Page - National Semiconductor (TI) |
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LM3204TL датащи(HTML) 13 Page - National Semiconductor (TI) |
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13 / 16 page ![]() Operating Mode Selection Control The BYP digital input pin is used to select between PWM/ Auto-bypass and Bypass operating mode. Setting BYP pin high (>1.2V) places the device in Forced Bypass mode. Setting BYP pin low (<0.4V) or leaving it floating places the device in PWM/Auto-bypass mode. Bypass and PWM operation overlap during the transition between the two modes. This transition time is approxi- mately 31µs when changing from PWM to Bypass mode, and 15µs when changing from Bypass to PWM mode. This helps prevent under or overshoots during the transition pe- riod between PWM and Bypass modes. Shutdown Mode Setting the EN digital pin low (<0.4V) places the LM3204 in a 0.1µA (typ.) Shutdown mode. During shutdown, the PFET switch, NFET synchronous rectifier, reference voltage source, control and bias circuitry of the LM3204 are turned off. Setting EN high (>1.2V) enables normal operation. EN should be set low to turn off the LM3204 during power-up and under voltage conditions when the power supply is less than the 2.7V minimum operating voltage. The LM3204 is designed for compact portable applications, such as mobile phones. In such applications, the system controller deter- mines power supply sequencing and requirements for small package size outweigh the benefit of including UVLO (Under Voltage Lock-Out) circuitry. Dynamically Adjustable Output Voltage The LM3204 features dynamically adjustable output voltage to eliminate the need for external feedback resistors. The output can be set from 0.8V to 3.6V by changing the voltage on the analog V CON pin. This feature is useful in PA applica- tions where peak power is needed only when the handset is far away from the base station or when data is being trans- mitted. In other instances, the transmitting power can be reduced. Hence the supply voltage to the PA can be re- duced, promoting longer battery life. See Setting the Output Voltage in the Application Information section for further details. Over Voltage Protection The LM3204 has an over voltage comparator that prevents the output voltage from rising too high, when the device is left in PWM mode under light-load conditions, during output voltage steps, or during startup. When the output voltage rises to 330mV over its target, the OVP comparator inhibits PWM operation to skip pulses until the output voltage returns to the target. During the over voltage protection mode, both the PWM PFET and the NFET synchronous rectifier are off. When the part comes out of the over voltage protection mode, the NFET synchronous rectifier remains off for ap- proximately 3.5µs to avoid inductor current going negative. Internal Synchronous Rectification While in PWM mode, the LM3204 uses an internal NFET as a synchronous rectifier to reduce rectifier forward voltage drop and associated power loss. Synchronous rectification provides a significant improvement in efficiency whenever the output voltage is relatively low compared to the voltage drop across an ordinary rectifier diode. With medium and heavy loads, the internal NFET synchro- nous rectifier is turned on during the inductor current down slope in the second part of each cycle. The synchronous rectifier is turned off prior to the next cycle. There is no zero cross detect, which means that the NFET can conduct cur- rent in both directions and inductor current is always con- tinuous. The advantage of this method is that the part re- mains in PWM mode at light loads or no load conditions. The NFET has a current limit. The NFET is designed to conduct through its intrinsic body diode during transient intervals before it turns on, eliminating the need for an external diode. Current Limiting A current limit feature allows the LM3204 to protect itself and external components during overload conditions. In PWM mode, a 940mA (max.) cycle-by-cycle current limit is nor- mally used. If an excessive load pulls the output voltage down to below approximately 0.375V, indicating a possible short to ground, then the device switches to a timed current limit mode. In timed current limit mode, the internal PFET switch is turned off after the current comparator trips, and the beginning of the next cycle is inhibited for 3.5µs to force the instantaneous inductor current to ramp down to a safe value. After the 3.5µs interval, the internal PFET is turned on again. This cycle is repeated until the load is reduced and the output voltage exceeds approximately 0.375V. Therefore, the device may not startup if an excessive load is connected to the output when the device is enabled. The synchronous rectifier is off in the timed current limit mode. Timed current limit prevents the loss of current control seen in some prod- ucts when the output voltage is pulled low in serious over- load conditions. A current limit is also provided for the NFET. This is approxi- mately −500mA. Both the NFET and the PFET are turned off in negative current limit until the PFET is turned on again at the beginning of the next cycle. The negative current limit inhibits buildup of excessive negative inductor current. In the Bypass mode, the bypass current limit is 1000mA (typ.). The output voltage drops when the bypass current limit kicks in. Thermal Overload Protection The LM3204 has a thermal overload protection function to protect the device from short-term misuse and overload conditions. When the junction temperature exceeds around 150˚C, the device inhibits operation. Both the PFET and the NFET are turned off in PWM mode, and the Bypass PFET is turned off in Bypass mode. When the temperature drops below 130˚C, normal operation resumes. Prolonged opera- tion in thermal overload conditions may damage the device. Application Information SETTING THE OUTPUT VOLTAGE The LM3204 features a pin-controlled variable output volt- age to eliminate the need for external feedback resistors. It can be programmed for an output voltage from 0.8V to 3.6V by setting the voltage on the V CON pin, as in the following formula: V OUT =3xVCON When V CON is between 0.267V and 1.20V, the output volt- age will follow proportionally by 3 times of V CON. If V CON is over 1.20V (VOUT = 3.6V), sub-harmonic oscilla- tion may occur because of insufficient slope compensation. www.national.com 13 |
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