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ESL contributions at the switching frequency, and the capacitive impedance component dominates. However,

depending on package and voltage rating of the ceramic capacitor, the effective capacitance can drop quite

significantly with applied DC voltage and operating temperature.

Ignoring the ESR term in Equation 9 gives a quick estimation of the minimum ceramic capacitance necessary

to meet the output ripple specification. One to four 47-µF, 10-V, X7R capacitors in 1206 or 1210 footprint is

a common choice. Use Equation 10 to determine if additional capacitance is necessary to meet the load-off

transient overshoot specification.

A composite implementation of ceramic and electrolytic capacitors highlights the rationale for paralleling

capacitors of dissimilar chemistries yet complementary performance. The frequency response of each capacitor

is accretive in that each capacitor provides desirable performance over a certain portion of the frequency range.

While the ceramic provides excellent mid- and high-frequency decoupling characteristics with its low ESR and

ESL to minimize the switching frequency output ripple, the electrolytic device with its large bulk capacitance

provides low-frequency energy storage to cope with load transient demands.

9.1.2.3 Input Capacitors

Input capacitors are necessary to limit the input ripple voltage to the buck power stage due to switching-

frequency AC currents. TI recommends using X5R or X7R dielectric ceramic capacitors to provide low

impedance and high RMS current rating over a wide temperature range. To minimize the parasitic inductance in

the switching loop, position the input capacitors as close as possible to the drain of the high-side MOSFET and

the source of the low-side MOSFET. The input capacitor RMS current is given by Equation 11.

CIN,rms

OUT

1 D

(11)

The highest input capacitor RMS current occurs at D = 0.5, at which point the RMS current rating of the

capacitors should be greater than half the output current.

Ideally, the DC component of input current is provided by the input voltage source and the AC component by the

input filter capacitors. Neglecting inductor ripple current, the input capacitors source current of amplitude (IOUT −

IIN) during the D interval and sinks IIN during the 1−D interval. Thus, the input capacitors conduct a square-wave

current of peak-to-peak amplitude equal to the output current. It follows that the resultant capacitive component

of AC ripple voltage is a triangular waveform. Together with the ESR-related ripple component, the peak-to-peak

ripple voltage amplitude is given by Equation 12.

OUT

ESR

(12)

The input capacitance required for a particular load current, based on an input voltage ripple specification of

ΔVIN, is given by Equation 13.

OUT

ESR

OUT

1 D

˜ '

(13)

Low-ESR ceramic capacitors can be placed in parallel with higher valued bulk capacitance to provide optimized

input filtering for the regulator and damping to mitigate the effects of input parasitic inductance resonating with

high-Q ceramics. One bulk capacitor of sufficiently high current rating and two or three 2.2-μF 100-V X7R

ceramic decoupling capacitors are usually sufficient. Select the input bulk capacitor based on its ripple current

rating and operating temperature.

9.1.2.4 Power MOSFETs

The choice of power MOSFETs has significant impact on DC/DC regulator performance. A MOSFET with

low on-state resistance, RDS(on), reduces conduction loss, whereas low parasitic capacitances enable faster

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LM5146

SNVSBV0A – JUNE 2021 – REVISED JUNE 2021

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