LM5146 datasheet(21/55 Pages) TI

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Figure 8-5 shows a clock signal at 400 kHz and the corresponding SW node waveform (VIN = 48 V, VOUT = 5 V,

free-running frequency = 280 kHz). The SW voltage waveform is synchronized with respect to the rising edge of

SYNCIN. The rising edge of the SW voltage is phase delayed relative to SYNCIN by approximately 100 ns.

8.3.7 Configurable Soft Start (SS/TRK)

After the EN/UVLO pin exceeds its rising threshold of 1.2 V, the LM5146 begins charging the output to the

DC level dictated by the feedback resistor network. The LM5146 features an adjustable soft start (set by a

capacitor from the SS/TRK pin to GND) that determines the charging time of the output. A 10-µA current source

charges this soft-start capacitor. Soft start limits inrush current as a result of high output capacitance to avoid

an overcurrent condition. Stress on the input supply rail is also reduced. The soft-start time, tSS, for the output

voltage to ramp to its nominal level is set by Equation 4.

REF

(4)

where

• CSS is the soft-start capacitance

• VREF is the 0.8-V reference

• ISS is the 10-µA current sourced from the SS/TRK pin

More simply, calculate CSS using Equation 5.

12.5 t

(5)

The SS/TRK pin is internally clamped to VFB + 115 mV to allow a soft start recovery from an overload event.

The clamp circuit requires a soft-start capacitance greater than 2 nF for stability and has a current limit of

approximately 2 mA.

8.3.7.1 Tracking

The SS/TRK pin also doubles as a tracking pin when master-slave power-supply tracking is required. This

tracking is achieved by simply dividing down the output voltage of the master with a simple resistor network.

Coincident, ratiometric, and offset tracking modes are possible.

If an external voltage source is connected to the SS/TRK pin, the external soft-start capability of the LM5146

is effectively disabled. The regulated output voltage level is reached when the SS/TRK pin reaches the 0.8-V

reference voltage level. It is the responsibility of the system designer to determine if an external soft-start

capacitor is required to keep the device from entering current limit during a start-up event. Likewise, the system

designer must also be aware of how fast the input supply ramps if the tracking feature is enabled.

PGOOD

2V/DIV

VOUT 1V/DIV

SS/TRK

160mV/DIV

94% VOUT

92% VOUT

10 ms/DIV

Figure 8-6. Typical Output Voltage Tracking and PGOOD Waveforms

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LM5146

SNVSBV0A – JUNE 2021 – REVISED JUNE 2021

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