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LM3370 датащи(PDF) 16 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor. Click here to check the latest version.
номер детали LM3370
подробное описание детали  Dual Synchronous Step-Down DC-DC Converter with Dynamic Voltage Scaling Function
PDF  23 Pages
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производитель  NSC [National Semiconductor (TI)]
домашняя страница  http://www.national.com
Logo NSC - National Semiconductor (TI)

LM3370 датащи(HTML) 16 Page - National Semiconductor (TI)

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I
2C Compatible Interface (Continued)
TRANSFERRING DATA
Every byte put on the SDA line must be eight bits long, with
the most significant bit (MSB) being transferred first. The
number of bytes that can be transmitted per transfer is
unrestricted. Each byte of data has to be followed by an
acknowledge bit. The acknowledge related clock pulse is
generated by the master. The transmitter releases the SDA
line (HIGH) during the acknowledge clock pulse. The re-
ceiver must pull down the SDA line during the 9th clock
pulse, signifying an acknowledge. A receiver which has been
addressed must generate an acknowledge after each byte
has been received.
After the START condition, I
2C master sends a chip address.
This address is seven bits long followed by an eighth bit
which is a data direction bit (R/W). For the eighth bit, a “0”
indicates a WRITE and a “1” indicates a READ. The second
byte selects the register to which the data will be written. The
third byte contains data to write to the selected register.
I
2C Compatible Write Cycle
20167309
W = write (SDA = “0”)
r = read (SDA = “1”)
ack = acknowledge (SDA pulled down by either master or slave)
rs = repeated startxx=36h
However, if a READ function is to be accomplished, a WRITE function must precede the READ function, as shown in the read
cycle waveform.
I
2C Compatible Read Cycle
20167310
www.national.com
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