ADPD1081 datasheet(72/74 Pages) AD

72 / 74 page

ADPD1080/ADPD1081

Data Sheet

Rev. C | Page 72 of 74

DATA REGISTERS

Table 44. Data Registers

Address

Data Bits

Access

Name

Description

0x60

[15:0]

FIFO_DATA

Next available word in FIFO.

0x64

[15:0]

SLOTA_CH1_16BIT

16-bit value of Channel1 in Time Slot A.

0x65

[15:0]

SLOTA_CH2_16BIT

16-bit value of Channel 2 in Time Slot A.

0x66

[15:0]

SLOTA_CH3_16BIT

16-bit value of Channel 3 in Time Slot A.

0x67

[15:0]

SLOTA_CH4_16BIT

16-bit value of Channel 4 in Time Slot A.

0x68

[15:0]

SLOTB_CH1_16BIT

16-bit value of Channel 1 in Time Slot B.

0x69

[15:0]

SLOTB_CH2_16BIT

16-bit value of Channel 2 in Time Slot B.

0x6A

[15:0]

SLOTB_CH3_16BIT

16-bit value of Channel 3 in Time Slot B.

0x6B

[15:0]

SLOTB_CH4_16BIT

16-bit value of Channel 4 in Time Slot B.

0x70

[15:0]

SLOTA_CH1_LOW

Low data-word for Channel 1 in Time Slot A.

0x71

[15:0]

SLOTA_CH2_LOW

Low data-word for Channel 2 in Time Slot A.

0x72

[15:0]

SLOTA_CH3_LOW

Low data-word for Channel 3 in Time Slot A.

0x73

[15:0]

SLOTA_CH4_LOW

Low data-word for Channel 4 in Time Slot A.

0x74

[15:0]

SLOTA_CH1_HIGH

High data-word for Channel 1 in Time Slot A.

0x75

[15:0]

SLOTA_CH2_HIGH

High data-word for Channel 2 in Time Slot A.

0x76

[15:0]

SLOTA_CH3_HIGH

High data-word for Channel 3 in Time Slot A.

0x77

[15:0]

SLOTA_CH4_HIGH

High data-word for Channel 4 in Time Slot A.

0x78

[15:0]

SLOTB_CH1_LOW

Low data-word for Channel 1 in Time Slot B.

0x79

[15:0]

SLOTB_CH2_LOW

Low data-word for Channel 2 in Time Slot B.

0x7A

[15:0]

SLOTB_CH3_LOW

Low data-word for Channel 3 in Time Slot B.

0x7B

[15:0]

SLOTB_CH4_LOW

Low data-word for Channel 4 in Time Slot B.

0x7C

[15:0]

SLOTB_CH1_HIGH

High data-word for Channel 1 in Time Slot B.

0x7D

[15:0]

SLOTB_CH2_HIGH

High data-word for Channel 2 in Time Slot B.

0x7E

[15:0]

SLOTB_CH3_HIGH

High data-word for Channel 3 in Time Slot B.

0x7F

[15:0]

SLOTB_CH4_HIGH

High data-word for Channel 4 in Time Slot B.

REQUIRED START-UP LOAD PROCEDURE

The required start-up load procedure is as follows:

1. Write to 0x1 to Register 0x4B, Bit 7 to enable the clock that

drives the state machine.

2. Write 0x0001 to Register 0x10 to enter program mode.

3. Write to the other registers; the register order is not

important while the device is in program mode.

4. Write 0x0002 to Register 0x10 to start normal sampling

operation.

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