LTC4380 datasheet(12/24 Pages) AD

12 / 24 page

LTC4381

Rev. 0

For more information www.analog.com

APPLICATIONS INFORMATION

voltage. Using a 68V Zener assures that D1 will not over-

ride the internal GATE pin clamp in the LTC4381-1 and

LTC4381-2 devices. For the LTC4381-3 and LTC4381-4,

the VCC operating range extends from 4V to 72V. Since

the SRC pin is regulated to VCC + 10.5V, D1 is chosen to

achieve the desired output clamping effect while at the

same time keeping the VCC pin within its 4V to 72V range.

The LTC4381 can operate through the cold crank down

to 4V in automotive applications, wheres VCC is powered

with a 12V supply initially and stays above 8V during the

cold crank period.

Fault Timer Overview

Overvoltage and overcurrent conditions, and high VDS

conditions in MOSFET are limited in duration by an adjust-

able fault timer. A capacitor at the TMR pin (CTMR) sets

the delay time before a fault condition is reported at the

FLT pin and MOSFET is turned off. CTMR also sets the cool

down time before MOSFET is permitted to turn back on

for the LTC4381-2 and LTC4381-4 auto retry versions.

The LTC4381-1 and LTC4381-3 versions simply latch off

at the end of the timer delay. A 10V or higher rated X7R

capacitor is recommended for CTMR to minimize tempera-

ture and voltage sensitivity.

Fault timing starts as soon as the input power is applied

with the part in the on condition, or when the part turns

on after application of power. A 1.5µA current is gener-

ated to pull up the TMR pin when the voltage across the

MOSFET is higher than 0.7V. The timer speeds up with

an additional current that varies with the power dissipated

in the MOSFET. The power dissipation is the product of

the voltage across the MOSFET (VDS) and the current

flowing through it (ID). VDS is inferred from the voltage

drop across the drain pin resistor, RDRN, while ∆VSNS rep-

resents ID.

At initial power-up, the 1.5µA pilot current charges the

TMR pin capacitor because the input supply is, at least

for a short time, more than 0.7V above the output voltage.

When the output rises to within 0.7V of the input supply

voltage, the pull-up current disappears and an internal

2µA current source discharges the TMR pin capacitor. The

capacitor must be sized to ride through the initial start-up

interval for successful power-up.

In the presence of a sustained fault, the timer current

charges the TMR pin to 1.215V. At this point, the FLT pin

pulls low to indicate a fault condition and the GATE pin

pulls low, shutting off the MOSFET. After faulting off, the

timer enters the cool down phase. At the end of the cool

down period, the LTC4381-1/LTC4381-3 remain off until

manually reset, while the LTC4381-2/LTC4381-4 auto-

matically restart.

Fault Timer Operation in Overvoltage or Large VDS

During start-up or an overvoltage condition, where the

MOSFET’s VDS exceeds 0.7V, the TMR pin charges from

0V to 1.215V with a current that varies principally as a

function of VDS and ID. VDS is inferred from the current

flowing in the DRN pin resistor, RDRN, while the voltage

difference between the SNS and OUT pins (∆VSNS) rep-

resents the MOSFET current, ID.

The TMR pin current is given by Equation 2.

ITMR = 0.0917

⎡

⎣

⎢

⎤

⎦

⎥

•VSNS • IDRN − 70 µA

⎡⎣ ⎤⎦

⎛

⎝

⎜⎜

⎞

⎠

⎟⎟ (2)

where 0.0917√A/V is the gain term of the multiplier. If

IDRN is less than 70µA (for example during start-up), use

ITMR of 1.5µA.

Substituting for ∆VSNS and IDRN is given by Equation 3.

ITMR = 0.0917

⎡

⎣

⎢

⎤

⎦

⎥ • ID •RSNS •

VDS

RDRN

− 70 µA

[ ]

⎛

⎝

⎜

⎞

⎠

⎟ (3)

If IDRN is less than 70µA (for example during start-up),

use ITMR of 1.5µA.

When TMR reaches 1.215V, the FLT pin pulls low and the

MOSFET is turned off and allowed to cool for an extended

period. The total elapsed time between the onset of output

clamping and turning off is given by Equation 4.

tTMR = VTMR(F) •

CTMR

ITMR

(4)

Because ITMR is a function of VDS and ID, the exact time

spent in overvoltage before turning off depends upon the

input waveform and the load current.

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