LTM4657 datasheet(7/28 Pages) AD

7 / 28 page

LTM4657

Rev. A

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VIN (D3-D4, E3-E4, F4, G4): Power input pins connect to

the drain of the internal top MOSFET and signal VIN to the

internal 3.3V regulator for the control circuitry for each

switching mode regulator channel. Apply input voltages

between these pins and GND pins. Recommend placing

input decoupling capacitance directly between VIN pins

and GND pins.

INTVCC (B3): Internal 3.3V Regulator Output of the

Switching Mode Regulator Channel. The internal power

drivers and control circuits are powered from this voltage.

Decouple each pin to GND with a minimum of 2.2µF local

low ESR ceramic capacitor.

RUN (B4): Run Control Input Pin. Enable regulator oper-

ation by tying the specific RUN pin above 1.2V. Tying it

below 1.1V shuts down the specific regulator channel.

TSENSE+ (A6): Temperature Monitor Pin. An internal diode

connected NPN transistor is placed between TSENSE+ and

TSENSE– pins. See the Applications Information section.

PIN FUNCTIONS

GND (B2, B6, C3-C7, D5-D7, E5-E7, F5-F7, G6-G7):

Power Ground Pins for Both Input and Output Returns.

Use large PCB copper areas to connect all GND together.

PGOOD (B5): Output Power Good Pin with Open-Drain

Logic. PGOOD is pulled to ground when the voltage on

the FB pin is not within ±8% of the internal 0.5V reference.

TSENSE– (A7): Low Side of the Internal Temperature

Monitor.

SW (B7): Switching node of each channel that is used

for testing purposes. Also an R-C snubber network can

be applied to reduce or eliminate switch node ringing, or

otherwise leave floating. See the Applications Information

section.

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