AD4021 datasheet(4/39 Pages) AD

4 / 39 page

AD4020/AD4021/AD4022

Data Sheet

Rev. B | Page 4 of 39

SPECIFICATIONS

VDD = 1.71 V to 1.89 V, VIO = 1.71 V to 5.5 V, REF pin voltage (VREF) = 5 V, all specifications TMIN to TMAX, high-Z mode disabled, span

compression disabled, turbo mode enabled, and sampling frequency (fS) = 1.8 MSPS for the AD4020, fS = 1 MSPS for the AD4021, and

fS = 500 kSPS for the AD4022, unless otherwise noted.

Table 1.

Parameter

Test Conditions/Comments

Min

Typ

Max

Unit

RESOLUTION

Bits

ANALOG INPUT

Voltage Range

IN+ voltage (VIN+) – IN− voltage

(VIN−)

−VREF

+VREF

Span compression enabled

−VREF × 0.8

+VREF × 0.8

Operating Input Voltage

VIN+, VIN− to GND

−0.1

+VREF + 0.1

Span compression enabled

0.1 × VREF

0.9 × VREF

Common-Mode Input Range

VREF/2 − 0.125

VREF/2

VREF/2 + 0.125

Common-Mode Rejection Ratio (CMRR)

Input frequency (fIN) = 500 kHz

Analog Input Current

Acquisition phase, TA = 25°C

0.3

High-Z mode enabled, converting

dc input at 1.8 MSPS

µA

THROUGHPUT

Complete Cycle

AD4020

555

AD4021

1000

AD4022

2000

Conversion Time

300

320

350

Acquisition Phase1

AD4020

325

AD4021

770

AD4022

1770

Throughput Rate2 (fS)

AD4020

1.8

MSPS

AD4021

MSPS

AD4022

500

kSPS

Transient Response3

325

DC ACCURACY

No Missing Codes

Bits

Integral Nonlinearity Error (INL)

−3.1

±1

+3.1

ppm

T = 0°C to 70°C

−2

±1

ppm

Differential Nonlinearity Error (DNL)

−0.5

±0.3

+0.5

LSB

Transition Noise

3.3

LSB

Zero Error

−35

+35

LSB

Zero Error Drift4

−0.3

+0.3

ppm/°C

Gain Error

−88

±12

+88

LSB

Gain Error Drift4

−1.2

+1.2

ppm/°C

Power Supply Sensitivity

VDD = 1.8 V ± 5%

±6

LSB

1/f Noise5

Bandwidth = 0.1 Hz to 10 Hz

µV p-p

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