Dual Path Lowband RF Receiver

400 MHz to 1100 MHz

Glitch-Free

4

Rev 1, April 2015

IDTF1130NBGI

Datasheet

For bypass ON, RF VGA input = +5 dBm, for Bypass OFF, RF VGA input = -20dBm/tone, Attenuator = 0 dB, STBY_A,

STBY_B = GND unless otherwise noted. Trace, Connector, and external transformer losses are de-embedded.

Parameter

Symbol

Conditions

Min

Typ

Max

Units

General

Logic Input High

All Control Pins

1.17

V

Logic Input Low

All Control Pins

0.67

V

Logic Current

All Control Pins

-120

+120

µA

Standby Mode Logic

STBY

Power OFF

Power ON

Supply Current

Bypass OFF, 2 Channels

360

410

1

mA

Bypass ON, 1 Channels

(CHA or CHB)

295

330

Bypass ON, 2 Channels

(CHA and CHB)

230

260

Standby Mode

20

26

RF Switching time

3

10% to 90% risetime

250

ns

DSA Settling time

3

10% to 90% risetime

100

ns

Turn ON time

3

10% to 90% risetime

225

ns

Turn OFF time

3

10% to 90% risetime

25

ns

Control Interface

14

bit

Serial Clock Speed

24

MHz

Note 1: Items in min/max columns in

Note 2: Items in min/max columns that are not bold/italics are Guaranteed by Design Characterization.

Note 3: Speeds are measured after SPI programming is completed (data latched with LE = HIGH).

Note 4: Gain across the entire frequency band is affected by the inclusion of the RF switch.