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STPMIC1APQR датащи(PDF) 124 Page - STMicroelectronics

номер детали STPMIC1APQR
подробное описание детали  Highly integrated power management IC for micro processor units
PDF  140 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
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STPMIC1APQR датащи(HTML) 124 Page - STMicroelectronics

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6.7.7
NVM LDOs voltage output shadow register 2 (NVM_LDOS_VOUT_SHR2)
Table 71. NVM_LDOS_VOUT_SHR2
7
6
5
4
3
2
1
0
reserved
reserved
reserved
reserved
LDO6_VOUT[1:0]
LDO5_VOUT[1:0]
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Address: 0xFE
Type: read write register
Default: depends on part number refer to Table 64. NVM shadow register map
Description: NVM LDO5-6 voltage output shadow register.
[7:4]
reserved
[3:2]
LDO6_VOUT[1:0]: LDO6 default output selection
00: 1.0 V
01: 1.2 V
10: 1.8 V
11: 3.3 V
[1:0]
LDO5_VOUT[1:0]: LDO5 default output selection
00: 1.8 V
01: 2.5 V
10: 2.9 V
11 : 3.3 V
STPMIC1
NVM shadow registers
DS12792 - Rev 7
page 124/140



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