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TLE8457CSJ датащи(PDF) 19 Page - Infineon Technologies AG |
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TLE8457CSJ датащи(HTML) 19 Page - Infineon Technologies AG |
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19 / 31 page ![]() Data Sheet 19 Rev. 1.1 2018-10-15 TLE8457C / TLE8457D LIN Transceiver with integrated voltage regulator General product characteristics 5.3 Thermal characteristics Note: This thermal data was generated in accordance with JEDEC JESD51 standards. For more information, please visit www.jedec.org. Table 5 Thermal resistance1) 1) Not subject to production test, specified by design. Parameter Symbol Values Unit Note or Test Condition Number Min. Typ. Max. Thermal resistance, PG-DSO-8 package version Junction to ambient RthJA – 130 – K/W 2) 2) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The product (IC+package) was simulated on a 76.2 × 114.3 × 1.5 mm3 board with 2 inner copper layers (2 × 70 μmCu, 2×35 μm Cu). Where applicable a thermal via array under the exposed pad contacted to the first inner copper layer. P_5.3.1 Thermal resistance, PG-TSON-8 package version Junction to ambient RthJA –60 – K/W 2) P_5.3.2 Junction to ambient – 190 – K/W Footprint only3) 3) Specified RthJA value is according to Jedec JESD51-3 at natural convection on FR4 1s0p board; The product (IC+package) was simulated on a 76.2 × 114.3 × 1.5 mm3 board with 1 inner copper layer (1 × 70 μmCu). P_5.3.5 Junction to ambient – 70 – K/W 300 mm2 heatsink on PCB3) P_5.3.6 Thermal shutdown junction temperature Thermal shutdown temperature TJSD 160 180 200 °C TJSD increasing P_5.3.3 Thermal shutdown hysteresis ΔT –10 – K TJSD decreasing P_5.3.4 |
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