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TAS5822MDCPR датащи(PDF) 80 Page - Texas Instruments |
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TAS5822MDCPR датащи(HTML) 80 Page - Texas Instruments |
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80 / 90 page ![]() • Because the ground pins are the best conductors of heat in the package, maintain a contiguous ground plane from the ground pins to the PCB area surrounding the device for as many of the ground pins as possible. 10.1.3.2 Stencil Pattern The recommended drawings for the TAS5822M device PCB foot print and associated stencil pattern are shown at the end of this document in the package addendum. Additionally, baseline recommendations for the via arrangement under and around the device are given as a starting point for the PCB design. This guidance is provided to suit the majority of manufacturing capabilities in the industry and prioritizes manufacturability over all other performance criteria. In elevated ambient temperature or under high-power dissipation use-cases, this guidance may be too conservative and advanced PCB design techniques may be used to improve thermal performance of the system. Note The customer must verify that deviation from the guidance shown in the package addendum, including the deviation explained in this section, meets the customer’s quality, reliability, and manufacturability goals. 10.1.3.2.1 PCB footprint and Via Arrangement The PCB footprint (also known as a symbol or land pattern) communicates to the PCB fabrication vendor the shape and position of the copper patterns to which the TAS5822M device will be soldered. This footprint can be followed directly from the guidance in the package addendum at the end of this data sheet. It is important to make sure that the thermal pad, which connects electrically and thermally to the PowerPAD™ of the TAS5822M device, be made no smaller than what is specified in the package addendum. This ensures that the TAS5822M device has the largest interface possible to move heat from the device to the board. The via pattern shown in the package addendum provides an improved interface to carry the heat from the device through to the layers of the PCB, because small diameter plated vias (with minimally-sized annular rings) present a low thermal-impedance path from the device into the PCB. Once into the PCB, the heat travels away from the device and into the surrounding structures and air. By increasing the number of vias, as shown in the Section 10.2 section, this interface can benefit from improved thermal performance. Note Vias can obstruct heat flow if they are not constructed properly. More notes on the construction and placement of vias are as follows: • Remove thermal reliefs on thermal vias, because they impede the flow of heat through the via. • Vias filled with thermally conductive material are best, but a simple plated via can be used to avoid the additional cost of filled vias. • The diameter of the drull must be 8 mm or less. Also, the distance between the via barrel and the surrounding planes should be minimized to help heat flow from the via into the surrounding copper material. In all cases, minimum spacing should be determined by the voltages present on the planes surrounding the via and minimized wherever possible. • Vias should be arranged in columns, which extend in a line radially from the heat source to the surrounding area. This arrangement is shown in the Section 10.2 section. • Ensure that vias do not cut off power current flow from the power supply through the planes on internal layers. If needed, remove some vias that are farthest from the TAS5822M device to open up the current path to and from the device. 10.1.3.2.2 Solder Stencil During the PCB assembly process, a piece of metal called a stencil on top of the PCB and deposits solder paste on the PCB wherever there is an opening (called an aperture) in the stencil. The stencil determines the quantity and the location of solder paste that is applied to the PCB in the electronic manufacturing process. In most cases, the aperture for each of the component pads is almost the same size as the pad itself. However, the thermal pad on the PCB is large and depositing a large, single deposition of solder paste would lead to TAS5822M SLASEV8 – DECEMBER 2020 www.ti.com 80 Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated Product Folder Links: TAS5822M |
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