CS91 Series

2

(Continued)

• Support for static timing sign off

• Support for memory (RAM/ROM) BIST

• Support for boundary SCAN

• Support for LOGIC BIST

• A variety of package options* : FCBGA (2116 pin Max) , EBGA, FBGA, and others.

* : Including items under development.

■ MACRO LIBRARY (Including macros being prepared)

1.

Logic cells (about 400 types)

2.

IP macros

3.

Special I/O interface macros

• Adder

• Decoder

• AND-OR Inverter

• Non-SCAN Flip Flop

• Clock Buffer

• Inverter

•Latch

•Buffer

• NAND

• OR-AND Inverter

•AND

•OR

•NOR

•Selector

• SCAN Flip Flop

• EOR

•ENOR

• Others

• AND-OR

CPU/DSP

ARM9, ARM7TDMI,

Communications DSP, DSP for AV

Ultra high speed I/F macros

622 Mbps to 780 Mbps, 2.5 Gbps to 3.125 Gbps, 10 Gbps

Interface macros

PCI, IEEE1394, USB, IrDA, etc.

Multimedia processing macros

JPEG, MPEG, etc.

Mixed signal macros

ADC, DAC, OPAMP, etc.

Compiled macros

RAM, ROM, multiplier, adder, multiplier-accumulator, etc.

PLL

Analog PLL, digital PLL

• T-LVTTL

• SSTL

• HSTL

• P-CML

•LVDS

• PCI

• USB