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VT6307L датащи(PDF) 28 Page - VIA Technologies, Inc. |
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VT6307L датащи(HTML) 28 Page - VIA Technologies, Inc. |
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28 / 54 page ![]() VT6307 PCI 1394a Host Controller Revision 1.2 October 1, 2002 -22- Register Descriptions Technologies, Inc. We Connect We Connect We Connect We Connect Link Controller Memory-Space Registers These registers occupy a 2048-byte space in system memory (offsets 0-7FFh). This address space begins at the address contained in the 1394 Configuration Space “Base Address Register” (Function 0 Configuration Space Offset 10h). All registers must be accessed as 32-bit words on 32-bit boundaries. Writes to reserved addresses have undefined results and reads from reserved addresses return indeterminate data. Unless specified otherwise, all register fields default to 0 and are unchanged after a 1394 bus reset. Some registers are designated as Set and Clear registers. These registers are in pairs, where a read of either address will return the current contents of the register. Data written to the Set register address is assumed to be a bit mask where one bits determine which bits should be set. Data written to the Clear register address is assumed to be a bit mask where one bits determine which bits should be cleared. Memory Offset 0 – Version............................................... RO 31-0 Version – OHCI 1.0 Mode .............. reads 0001 0000 Version – OHCI 1.1 Mode .............. reads 0001 0010 Memory Offset 8 – Asynchronous Transmit Retries ..... RW 31-29 Second Limit ........................................................ RO Count in Seconds (modulo 8). These bits and the Cycle Limit bits below define a time limit for retry attempts when the outbound dual-phase retry protocol is in use. 28-16 Cycle Limit ......................................................... RO Count in Cycles (modulo 8000). These bits and the Second Limit bits above define a time limit for retry attempts when the outbound dual-phase retry protocol is in use. 15-12 Reserved ........................................always reads 0 11-8 Max Physical Response Retries ..............default = 0 Specifies how many times to attempt to retry the transmit operation for the physical response packet when a “busy” or “ack_type_error” acknowledge is received from the target node. This value is used only for responses to physical requests. 7-4 Max AT Response Retries .......................default = 0 Specifies to the Asynchronous Transmit Response subsystem how many times to attempt to retry the transmit operation for the response packet when a “busy” or “ack_type_error” acknowledge is received from the target node. This value is used only for responses sent by software via the Asynchronous Transmit Response DMA context. 3-0 Max AT Request Retries ..........................default = 0 Specifies to the Asynchronous Transmit DMA Request subsystem how many times to attempt to retry the transmit operation for a packet when a “busy” or “ack_type_error” acknowledge is received from the target node. This value is used only for responses sent by software via the Asynchronous Transmit Request DMA context. |
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