PFS173 datasheet(39/105 Pages) PADAUK

39 / 105 page

PFS173

8bit MTP MCU with 8-bit ADC

Page 39 of 105

PDK-DS-PFS173-EN_V105-Jun. 19, 2020

5.5.1

Internal reference voltage (Vinternal R)

The internal reference voltage Vinternal R is built by series resistance to provide different level of reference

voltage, bit 4 and bit 5 of gpcs register are used to select the maximum and minimum values of Vinternal R

and bit [3:0] of gpcs register are used to select one of the voltage level which is deivided-by-16 from the

defined maximum level to minimum level. Fig.5 to Fig.8 shows four conditions to have different reference

voltage Vinternal R. By setting the gpcs register, the internal reference voltage Vinternal R can be ranged from

(1/32)*VDD to (3/4)*VDD.

gpcs.5=1

gpcs.5=0

gpcs.4=0

gpcs.4=1

16 stages

VDD

MUX

gpcs[3:0]

Case 1 : gpcs.5=0 & gpcs.4=0

internal R = (3/4) VDD ~ (1/4) VDD + (1/32) VDD

@ gpcs[3:0] = 1111 ~ gpcs[3:0] = 0000

internal R =

* VDD +

* VDD, n = gpcs[3:0] in decimal

(n+1)

Fig.5: Vinternal R hardware connection if gpcs.5=0 and gpcs.4=0

gpcs.5=1

gpcs.5=0

gpcs.4=0

gpcs.4=1

16 stages

VDD

MUX

gpcs[3:0]

Case 2 : gpcs.5=0 & gpcs.4= 1

internal R = (2/3) VDD ~ (1/24) VDD

@ gpcs[3:0] = 1111 ~ gpcs[3:0] = 0000

internal R =

* VDD, n = gpcs[3:0] in decimal

(n+1)

Fig.6: Vinternal R hardware connection if gpcs.5=0 and gpcs.4=1

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