PFS172 datasheet(92/92 Pages) PADAUK

92 / 92 page

PFS172

8bit MTP MCU with 8-bit ADC

Page 92 of 92

PDK-DS-PFS172-EN_V000-May 8, 2020

9.3. Using ICE

(1)

PDK5S-I-S01/2(B) supports PFS172 MCU emulation, the following items should be noted when using

PDK5S-I-S01/2(B) to emulate PFS172:



PDK5S-I-S01/2(B) doesn’t support the instruction NMOV/SWAP/NADD/COMP with RAM.



PDK5S-I-S01/2(B) doesn’t support SYSCLK=ILRC/16.



PDK5S-I-S01/2(B) doesn’t support the function Tm2.gpcrs/Tm3.gpcrs.



PDK5S-I-S01/2(B) doesn’t support the code options: PB4_PB7_Drive, GPC_PWM, TMx_source

and TMx_bit.



PDK5S-I-S01/2(B) doesn’t support PAPL, PBPL.



When using GPCC output, PA3 will be influenced.



When simulating PWM waveform, please check the waveform during program running. When the

ICE is suspended or single-step running, its waveform may be inconsistent with the reality.



The ILRC frequency of the PDK5S-I-S01/2(B) simulator is different from the actual IC and is

uncalibrated, with a frequency range of about 34K~38KHz.



Fast Wakeup time is different from PDK5S-I-S01/2(B): 128 SYSCLK, PFS172: 45 ILRC



Watch dog time out period is different from PDK5S-I-S01/2(B):

WDT period

PDK5S-I-S01/2(B)

PFS172

misc[1:0]=00

2048 * TILRC

8192 * TILRC

misc[1:0]=01

4096 * TILRC

16384 * TILRC

misc[1:0]=10

16384 * TILRC

65536 * TILRC

misc[1:0]=11

256 * TILRC

262144 * TILRC

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