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DF69 датащи(PDF) 13 Page - PADAUK Technology.

номер детали DF69
подробное описание детали  DC Fan Controller
PDF  106 Pages
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производитель  PADAUK [PADAUK Technology.]
домашняя страница  http://www.padauk.com.tw/
Logo PADAUK - PADAUK Technology.

DF69 датащи(HTML) 13 Page - PADAUK Technology.

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DF69
DC Fan Controller
Symbol Description
Min
Typ
Max
Unit
Conditions (Ta=25
℃)
fIHRC
Frequency of IHRC after calibration *
15.84*
16*
16.16*
MHz
25
oC, VDD=3.5V~5.5V
15.36*
16*
16.64*
VDD=3.5V~5.5V,
0
oC <Ta<85oC*
15.2*
16*
16.8*
VDD=4.75V~5.5V,
0
oC <Ta<105oC*
14.72*
16*
17.28*
VDD=3.5V~5.5V
-20
oC <Ta<85 oC
14.56*
16*
17.44*
VDD=4.75V~5.5V
-20
oC <Ta<105 oC*
14.08*
16*
17.92*
VDD=3.5V~5.5V
-40
oC <Ta<85 oC*
13.92*
16*
18.08*
VDD=4.75V~5.5V
-40
oC <Ta<105 oC*
fILRC
Frequency of ILRC *
20.4*
24*
27.6*
KHz
VDD=5.0V, Ta=25
oC
15.6*
24*
32.4*
VDD=5.0V, -40
oC <Ta<85oC*
10.2*
12*
13.8*
VDD=3.3V, Ta=25
oC
7.8*
12*
16.2*
VDD=3.3V, -40
oC <Ta<85oC*
VADC
Workable ADC operating Voltage
2.5
5.0
V
VAD
AD Input Voltage
0
VDD
V
ADrs
ADC resolution
10
bit
ADclk
ADC clock period
2
us
2.5V ~ 5.5V
tADCONV
ADC conversion time
(TADCLK is the period of the selected
AD conversion clock)
13
14
15
TADCLK
8-bit resolution
9-bit resolution
10-bit resolution
AD
DNL
ADC Differential NonLinearity
±2*
LSB
AD INL ADC Integral NonLinearity
±4*
LSB
ADos
ADC offset*
3
4
mV
-40
oC <Ta<85 oC
-40
oC <Ta<105 oC
tINT
Interrupt pulse width
30
ns
VDD = 5.0V
VDR
RAM data retention voltage*
1.5
V
In power-down mode.
tWDT
Watchdog timeout period
(TILRC is the clock period of ILRC)
2048
TILRC
misc[1:0]=00 (default)
4096
misc[1:0]=01
16384
misc[1:0]=10
256
misc[1:0]=11
tSBP
System boot-up period from
power-on
1024
TILRC
Where TILRC is the clock
period of ILRC
©Copyright 2018, PADAUK Technology Co. Ltd
Page 13 of 106
PDK-DS-DF69_V003 – Apr. 18, 2018



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