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STM32G071C8 датащи(PDF) 33 Page - STMicroelectronics |
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STM32G071C8 датащи(HTML) 33 Page - STMicroelectronics |
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33 / 133 page ![]() DS12232 Rev 3 33/133 STM32G071x8/xB Functional overview 35 half-duplex communication mode. Some can also support SmartCard communication (ISO 7816), IrDA SIR ENDEC, LIN Master/Slave capability and auto baud rate feature, and have a clock domain independent of the CPU clock, which allows them to wake up the MCU from Stop mode. The wakeup events from Stop mode are programmable and can be: • start bit detection • any received data frame • a specific programmed data frame All USART interfaces can be served by the DMA controller. 3.22 Low-power universal asynchronous receiver transmitter (LPUART) The device embeds one LPUART. The peripheral supports asynchronous serial communication with minimum power consumption. It supports half duplex single wire communication and modem operations (CTS/RTS). It allows multiprocessor communication. The LPUART has a clock domain independent of the CPU clock, and can wakeup the system from Stop mode. The Stop mode wakeup events are programmable and can be: • start bit detection • any received data frame • a specific programmed data frame Only a 32.768 kHz clock (LSE) is needed to allow LPUART communication up to 9600 baud. Therefore, even in Stop mode, the LPUART can wait for an incoming frame while Table 9. USART implementation USART modes/features(1) 1. X: supported USART1 USART2 USART3 USART4 Hardware flow control for modem X X Continuous communication using DMA X X Multiprocessor communication X X Synchronous mode X X Smartcard mode X - Single-wire half-duplex communication X X IrDA SIR ENDEC block X - LIN mode X - Dual clock domain and wakeup from Stop mode X - Receiver timeout interrupt X - Modbus communication X - Auto baud rate detection X - Driver Enable X X |
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