XRT79L71IB datasheet(2/441 Pages) EXAR

2 / 441 page

XRT79L71

PRELIMINARY

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REV. P1.0.3

1 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC

RECEIVE CELL PROCESSING

• Extraction of ATM cells from PLCP frame or directly

from E3 or DS3 frame

• Termination of PLCP frame

• Supports payload cell de-scrambling

TRANSMIT PACKET PROCESSING

• Inserts PPP packets into data stream

• Maps HDLC data stream directly into DS3 or E3

frame

• Extracts in-band messaging packets

• Supports CRC-16/32, HDLC flag and Idle

sequence generation

RECEIVE PACKET PROCESSING

• Extracts HDLC data stream from DS3 or E3 frame

• Inserts in-band messaging packets

• Detects and removes HDLC flags

UTOPIA/ SYSTEM INTERFACE

• 8/16 bit UTOPIA Level I and II and PPP Multi-PHY

Interface operating at 25, 33 or 50 MHz.

• Compliant with ATM Forum UTOPIA II interface

• Programmable FIFO size for both Transmit and

Receive direction

• Compliant to POS-PHY Level 2 interface

SERIAL INTERFACE

• Serial clock and data interface for accessing DS3/

E3 framer

• Serial clock and data interface for accessing cell/

packet processor

APPLICATIONS

• Digital Access and Cross Connect Systems

• 3G Base Stations

• DSLAMs

• Digital, ATM, WAN and LAN Switches

PRODUCT ORDERING INFORMATION

FIGURE 1. BLOCK DIAGRAM OF THE XRT79L71

TU -3

PO H

P roces sor

Jitter

A tte nuator

Rx D S 3/

F ram er

PLC P &

O verh ead

UT O P IA /

PO S-PH Y

Inte rface

HDLC

C ontroller

R ece iver B lo c k

JT A G T est P ort

C lock &

Data

Rec ov ery

AG C /

Equ alize r

RTIP

RR IN G

T ran sm itte r B lo c k

AT M C ell

P roces sor

or P P P

P roces sor

UT O P IA /

PO S-PH Y

Inte rface

AT M C ell

P roces sor

or P P P

P roces sor

HDLC

C ontroller

PLC P &

O verh ead

Tx D S 3/

F ram er

Jitter

A tte nuator

Tim in g

C ontrol

Pulse

S ha per

T TIP

TR IN G

M icroproces sor Inte rface

12.288

MH z

Clk IN

Clock

Synth esizer

E3 C L K

DS 3 C L K

Rec eive

U topia

PO S-PH Y

Inte rface

Trans m it

U topia

PO S-PH Y

Inte rface

PRODUCT NUMBER

PACKAGE TYPE

OPERATING TEMPERATURE RANGE

XRT79L71IB

17X17 mm 208 Ball Shrink Thin Ball Grid Array

-40°C to +85°C

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