SAMV71Q21 datasheet(25/41 Pages) MICROCHIP

номер детали	SAMV71Q21

подробное описание детали	SAM E70/S70/V70/V71 Family Silicon Errata and Data Sheet Clarification

PDF	41 Pages

Scroll/Zoom	100%

производитель	MICROCHIP [Microchip Technology]

домашняя страница	http://www.microchip.com

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25 / 41 page

12.

Power Management Controller (PMC)

12.1

Wait Mode Exit Fail from Flash

The delay to exit from Wait mode is too short to respect the Flash wake-up time from Stand-by mode and

Deep Power-down mode. This delay may lead to bad opcode fetching.

Workaround 1

If Flash in Stand-by mode (FLPM = 0) or in Deep Power-down mode (FLPM = 1) is used, run the wake-up

routine from SRAM. This option provides a slight improvement in power consumption.

Workaround 2

If Flash in Stand-by mode (FLPM = 0) or in Deep Power-down mode (FLPM = 1) is used, run the wake-up

routine from SRAM. This option provides a slight improvement in power consumption.

Affected Silicon Revisions

12.2

PMC_OCR Register Calibration Reporting

When reading the PMC_OCR register with the SEL8 and SEL12 bits cleared, the CAL8 and CAL12 bits

are not updated with the manufacturing calibration bits of the Main RC Oscillator. However, the Main RC

Oscillator is loaded with this manufacturing calibration data.

Workaround

To recover the manufacturing calibration bits of the Main RC oscillator, use the following steps:

Execute the ‘Get CALIB Bit’ command by writing the FCMD bit in the EEFC_FCR register with the

GCALB command.

Read the EEFC_FRR register. The 8 MHz RC calibration bits are EEFC_FRR bits [17-11] and the

the 12 MHz RC calibration bits are EEFC_FRR bits [25-19].

Affected Silicon Revisions

SAM E70/S70/V70/V71 Family

Power Management Controller (PMC)

Datasheet Errata

DS80000767C-page 25

SAMV71Q21 датащи(PDF) 25 Page - Microchip Technology