PXE1610C

PDS-PXE1-PXM1-C-001A

6

Pin #

Name

I/O

Type

Description

35

BVSEN

I

Analog

Loop_B voltage sense inputs. Refer to AVSEN/AVREF description. If

unused, these pins may be grounded or left open.

36

BVREF

I

Analog

37

BIREF1

I

Analog

Loop_B current sense inputs. Refer to AIREF1/AISEN1 description. If

Loop_B is not used, these pins may be left open/grounded.

38

BISEN1

I

Analog

39

MP3

I/O

Note D

Multi-purpose pin-3 configurable as FAULT2 or SMBAlert#; Note C. Note F

40

MP4

I/O

Note D

Multi-purpose pin-4 configurable as FAULT2 or SMBAlert#; Note C. Note F

41

XADDR2

I

Analog

Used in conjunction with XADDR1, the I2C address of the controller is set by

tying an external resistor between this pin and GND.

42

BTSEN

I

Analog

Loop_B external temperature sense input. Refer to ATSEN description.

43

ATSEN

I

Analog

Loop_A external temperature sense input. If the digital controllers

’ internal

temperature sensor is selected and/or the external temperature reporting is

not required, the ATSEN pin may be left open (floating).

44

XADDR1

I

Analog

Used in conjunction with XADDR2, the I2C address of the controller is set by

tying an external resistor between this pin and GND.

45

VINSEN

I

Analog

VIN (+12V) voltage sense input. The VINSEN pin may be connected to the

+12V supply through a resistor divider, or to the PI sense network and is

used to guarantee a valid input voltage before starting up (input under-

voltage lockout). Refer to the Power Input Sense section herein for details. If

unused, this pin may be grounded.

46

IINSEN

I

Analog

Current sense input used for PWR_IN calculation. An external amplifier or

the PI sense network may be used to translate current information from a

precision sense resistor to an input signal for the controller. Refer to the

Power Input Sense section herein for details. If unused, this pin may be

grounded.

47

VDD

S

supply

3.3V power supply input to the digital controller. This pin should be

connected to the system +3.3V supply and decoupled using high quality

1.0μF + 0.1μF ceramic capacitors.

48

VD12

S

Internal

Supply

Do not apply voltage to or ground this pin. Internally generated 1.2V voltage

reference used to power digital core logic. The pin is provided for attaching

external decoupling capacitors only

. Decouple using high quality 1.0μF +

0.1μF ceramic capacitors. This pin is not intended to be used to drive

external components as +1.2V reference.

Die Paddle

S

Ground

Exposed Ground pad beneath the device must be soldered to the PCB

ground for proper operation.

Note C:

ADREN/BDREN/CDREN = Loop_A/B/C Driver Enable. BVRRDY/CVRRDY = Loop_B/C VR Ready. BVREN/CVREN = Loop_B/C VR

Enable. LPM = Low Power Mode. PXE1xxxC is pin-to-pin compatible with PXE1xxxB with equivalent, improved, or expanded

capability.

Note D: Programmable: depending on the selected function, the MPx pin may be programmed to 3.3V CMOS, Open Drain, or Analog.

Note E:

If the SVID interface is not used, the pins need to be tied together and pulled-up to VD12 through a 1K resistor.

Note F:

During device power up, this pin will be internally shorted to GND for a maximum of 21 ms. If the pin is configured for use as a

signal source.

Note G: There is no internal biasing on AVREN. This pin must not be left open.