XRT85L61

BITS (BUILDING INTEGRATED TIMING SUPPLY) CLOCK EXTRACTOR

REV. 1.0.1

7

FUNCTIONAL DESCRIPTION

The XRT85L61 is an integrated BITS (Building Integrated Timing Supply) Clock Generator. Simplified block

diagram of the chip is shown in Figure 1.

The XRT85L61 extracts the clock signals from the following synchronization lines:

s

Balanced 100

Ω lines with 1544 kbps DS1 pattern.

s

Balanced 120

Ω or unbalanced 75 Ω lines with 2048 kbps RZ pattern.

s

Balanced 120

Ω or unbalanced 75 Ω line with 2048 kbps NRZ pattern.

s

Balanced 110

Ω line with 64 kbps having 8 kHz violations; a “64 kHz + 8 kHz sync pattern.

s

Balanced 110

Ω line with a 64 kbps pattern having both 8 kHz and 400 Hz violations; a “64 kHz + 8 kHz

+ 400 Hz” sync pattern.

1.0

OPERATING MODE:

The operating mode for the XRT85L61 is shown in Table 1.

1.1

64 kHz Clock Mode:

The XRT85L61 receives the 64 kbps ternary RZ signal. Two modes of 64 kHz operation is possible by selecting

S1, S2 and S3 as shown in Table 1.

S1

S2

S3

MODE

RPOS / RNEG

0

0

0

64 kHz + 8 kHz

RZ

0

0

1

64 kHz + 8 kHz + 400 Hz

RZ

0

1

0

E1RZ

RZ

0

1

1

E1NRZ

RZ

100

T1

RZ

1

0

1

T1 (full width)

1

1

0

E1 (full width)

111

Reserved

Signal Format

(a) AMI with 8 kHz Bipolar Violation

(b) AMI with 8 kHz Bipolar Violation removed at every 400 Hz.

Alarm Condition

Alarm should not occur against the amplitude range from 0.63 V to 1.1 V