TDA7513T datasheet(22/59 Pages) STMICROELECTRONICS

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TDA7513T

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IFS0 - IFS2.

5.4 AUDIO PROCESSOR

5.4.1 Input Multiplexer

CD quasi differential 1

CD quasi differential 2

Stereodecoder input (for both FM and AM signals).

5.4.2 Input stages

The quasi-differential input stages (see figure 4) have been designed to cope with some CD players in the

market having a significant high source impedance which affects strongly the common-mode rejection of

"normal" differential input stages. The additional buffer of the CD input avoids this drawback and offers the

full common-mode rejection even with those CD players. The quasi-differential input can also be used with

normal stereo single-ended output signal sources such as TAPEOUT.

5.4.3 AutoZero

In order to reduce the number of pins there is no AC coupling between the In-Gain and the following stage,

so that in theory any offset generated by or before the In-Gain stage would be transferred or even ampli-

fied to the output. To avoid this undesired situation a special offset cancellation stage called AutoZero is

implemented. This stage is located before the Volume block to eliminate all offsets generated by the Ste-

reodecoder, the Input Stage and the In-Gain stage (please note that externally generated offsets, e.g.

those generated because of leakage current into the coupling capacitors, are not cancelled).

The auto-zeroing is started every time the APSD data byte 0 is selected and takes a maximum time of

0.6ms. The rationale behind this choice is that the APSD byte encodes the signal source selection, and

auto-zero ought to be performed every time a new source is selected. To avoid audible clicks the audio-

processor is muted before the volume stage during this time.

5.4.4 AutoZero Remain

In some cases, for example if the uP is executing a refresh cycle of the I2C bus programming, it is not

necessary to start a new AutoZero action because no new source is selected and an undesired mute

would appear at the outputs. For such applications the device can be switched in the "AutoZero Remain

mode" (Bit 6 of the APSD subaddress byte). If this bit is set to high, the APSD data byte 0 can be loaded

without invoking the AutoZero and the old adjustment value remains.

5.4.5 Softmute

The digitally controlled softmute stage allows signal muting and unmuting with a I2C bus programmable

slope. The mute process can either be activated by pin #AUDIOMUTE or I2C bus. The slope is realized

in a special S-shaped curve so as to slowly mute in the critical regions (see figure 5). For timing purposes

the Bit 3 of the I2C bus output register is set to 1 from the start of muting until the end of unmuting.

5.4.6 BASS

There are four parameters programmable in the bass filter stage: (see figs 6, 7, 8, 9):

5.4.7 Attenuation

Figure 6 shows the attenuation as a function of frequency at a center frequency at a center frequency of

80Hz.

5.4.8 Center Frequency

Figure 7 shows the four possible center frequencies: 60,70,80 and 100Hz.

5.4.9 Quality Factors

Figure 8 shows the four possible quality factors: 1, 1.25, 1.5 and 2.

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